Principal Engineering IP Program Manager

2 weeks ago


Santa Clara, California, United States Marvell Semiconductor Full time
About Marvell
Marvell's semiconductor innovations serve as the fundamental components of the data infrastructure that connects our global community. Our cutting-edge technology is empowering advancements across enterprise, cloud and AI, automotive, and carrier architectures, opening up new avenues for growth.

At Marvell, you have the opportunity to impact individual lives, elevate entire industries, and harness the transformative potential of the future.

Your Team, Your Impact

The IP Program Manager will be an integral part of Central Engineering's program management team, overseeing the development and delivery of IP for Marvell's product lines and custom ASIC initiatives. This role provides a unique opportunity to contribute to the success of various Marvell programs.

What You Can Expect

The ideal candidate will possess a comprehensive understanding of SoC IP requirements and will formulate strategies to deliver and support the IP from initial conception through to program Mass Production Release (MPR).

We seek a candidate with extensive knowledge in related IP engineering, collaborating across various functions including analog, logic, design for test, layout, timing, validation, and PnR.

A solid grasp of technologies and the IP development process and methodologies is essential. Exceptional interpersonal and communication skills are mandatory.

The role entails overall responsibility for the program management of IP development and delivery to Marvell's product business units, driving the closure of IP specifications and requirements.

Demonstrated leadership skills are crucial to chair weekly cross-functional meetings, evaluating status, milestones, and the completeness of plans, while providing regular updates to Marvell's executive stakeholders.

Support for Marvell's Program Management Process is expected, along with matrixed leadership of engineering program managers across the organization.

Key responsibilities include executing lessons learned, managing risks, and enforcing established processes, ensuring the successful outcome of IP development and delivery.

What We're Looking For

A Bachelor's degree in Electrical Engineering is required, with a Master's degree in Electrical Engineering or related fields preferred.

Candidates should have 10-15 years of relevant professional experience, or a Master's/PhD with 5-10 years of experience.

6+ years of experience as an Engineering Project Manager in the Semiconductor industry is preferred, along with 6+ years of experience as a mixed-signal IP designer.

Familiarity with SoC/IC design flow for advanced process technologies and methodologies in Silicon Development is necessary.

Strong verbal and written communication skills, along with the ability to collaborate effectively with technical managers to drive projects to completion, are essential.

Proven ability to build effective partnerships and relationships with key stakeholders is required, along with excellent leadership capabilities.

A broad background in ASIC or other Microelectronics development is expected.

Compensation and Benefits
The expected base pay range for this role is $138,100 per annum, subject to adjustments based on job-related skills, experience, qualifications, work location, and market conditions.

Marvell offers a comprehensive compensation package that includes base salary, bonuses, and equity, alongside health and financial benefits. This includes flexible time off, 401k, year-end shutdown, floating holidays, and paid time off for volunteering.

This position is eligible for a hybrid work model, allowing a blend of remote and on-site work.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability, or protected veteran status.

Applicants requiring reasonable accommodations during the selection process should contact Marvell HR Helpdesk.



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