Principal Engineer
4 weeks ago
Are you looking for a challenging opportunity to be part of a dynamic team that works on cutting-edge technology? At Microchip Technology, we offer a unique chance to contribute to the development of innovative solutions that power the world around us.
Our Data Center Solutions (DCS) business unit is rapidly growing, and we are seeking a highly skilled Principal Engineer-Design to join our team. As a key member of our team, you will be responsible for designing complex digital integrated circuits at the block, subsystem, or device level, which will be coded in Verilog and System Verilog.
The successful candidate will have a strong background in RTL Design, with experience in complex ASIC design flows, including block and chip level simulation and debug, logic synthesis, static timing analysis, layout, and revision control. Additionally, the candidate should have a working knowledge of design and verification tools such as Synopsys Design Compiler, Cadence Incisive, waveform viewers, and other similar tools.
The ideal candidate will have excellent analytical and debugging skills, with the ability to proactively solve issues. Good verbal and written communication skills in English are also essential, as well as excellent teamwork and time management skills, self-direction, and the ability to work under pressure.
As a Principal Engineer-Design, you will have the opportunity to expand your skill set and drive key elements of the industry's technology leadership. If you are a motivated and experienced professional looking for a new challenge, we encourage you to apply for this exciting opportunity.
Key Responsibilities:
- Design of complex digital integrated circuits at the block, subsystem, or device level (100K to 50M+ gates)
- Define subsystem/block feature sets, describe design and implementation details into engineering documents and registers documents
- Support emulation, ASIC lab validation including lab debug and providing logic modifications and workarounds
- Communicate regularly with the design and verification team in multiple locations to resolve issues, communicate status and solve technical problems
- Communicate with architects to justify design implementation decisions and associated trade-offs
- Read and understand applicable storage and computer interface protocol standards
Requirements/Qualifications:
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or equivalent
- 10+ years related experience
- RTL Design - Experience in RTL Design using System Verilog, Verilog is required
- Experience and understanding of complex ASIC design flows, including block and chip level simulation and debug, logic synthesis, static timing analysis, layout and revision control
- Experience with Formal Verification a plus
- Working knowledge of design and verification tools such as Synopsys Design Compiler, Cadence Incisive, waveform viewers, and other similar tools
- Scripting and programming skills using csh, bash, perl, python, tcl, etc.
- Protocol knowledge and experience in PCI-Express will be an asset
- Knowledge of AHB/AXI bus protocols is desired
- Excellent knowledge in logic synthesis and static timing analysis
- Experience in designing the chip top level with IOs, pin out and package design
- Worked with physical design teams for layout implementation. Familiar with low power methodology and flows.
- Capable of debugging EDA tool issues or design related issues
- Working knowledge of DFT
- Excellent analytical and debugging skills and the ability to proactively solve issues
- Good verbal and written communication skills in English will be an asset
- Excellent teamwork and time management skills, self-direction, the ability to work under pressure and the desire to excel in a competitive environment
Travel Time: 0% - 25%
Physical Attributes: Hearing, Seeing, Talking, Works Alone
Physical Requirements: 80% sitting, 10% standing, 100% inside
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
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