Chief ASIC Design Architect

5 days ago


Santa Clara, California, United States Ambarella Inc. Full time
Job Description

We are seeking a highly skilled Chief ASIC Design Architect to join our team at Ambarella Inc.

About the Role:

  • Design and implement high-performance video compression logic, image processing logic, vector processing, and neural network accelerator logics, processor cores, and memory sub-systems in Verilog and System Verilog.
  • Develop robust logic design, implementation, and verification techniques using Verilog, System Verilog, and other programming languages as required.
  • Synthesize and optimize RTL for timing, area, and power.
  • Drive the development of front-end methodologies and tool flows.
  • Collaborate in chip bring-up and testing.
  • Analyze and review code coverage and functional coverage, providing recommendations to the verification team to address any gaps.

Requirements:

  • A Master's degree in Electrical/Electronics/Computer Engineering with 0-5 years of experience.
  • Excellent understanding of computer architecture, logic design, and VLSI design principles.
  • Knowledge of System Verilog, Verilog, and Perl programming languages.
  • Familiarity with design verification and functional coverage techniques.
  • Ability to write assembly language programs and proficient in scripting languages.
  • Strong communication skills and a collaborative mindset.
  • Exceptional problem-solving abilities.
  • Bonus: Knowledge of logic synthesis and timing closure.

What We Offer:

  • A competitive salary range of $135,000 - $170,000.
  • New hire RSU grants and annual RSU grants opportunities.
  • Comprehensive benefits package.

Additional Information:

  • Job Identification: 10679.
  • Degree Level: Master's Degree.
  • Job Schedule: Full time.
  • Location: US Headquarters.


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