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Memory Firmware Architect

2 months ago

San Jose, California, United States Droisys Full time
About the Role

Droisys is a leading innovation technology company that helps businesses accelerate their digital transformation. We leverage our technical expertise, Agile methodologies, and data-driven intelligence to modernize systems and simplify human-technology interaction.

We're seeking a talented Memory Firmware Architect to join our team. As a key member of our Memory IO team, you will be responsible for designing and developing high-speed LPDDR, DDR, and inter-chip IO IPs.

Key Responsibilities
  • Firmware design and development of DDR PHY & DRAM Training steps
  • Firmware development of DDR PHY for ATE Testing, IP Char & SoC Power
  • Pre-silicon FW coding and simulation against Architectural and RTL models
  • Post-silicon lab bring-up and optimization of DDR Init and Run Time FW
  • Post-silicon DDR Training enhancements to enable robust links for higher reliability / higher frequency margin
  • Working with SoC/Product firmware teams to define features and specs
Requirements
  • 9+ years' experience as firmware engineer
  • Excellent knowledge of C, C++, and any scripting language; knowledge of Verilog and Python is a plus
  • Ability to adapt and learn new toolsets and frameworks
  • Strong understanding of synchronization techniques (handshakes, message passing); knowledge of hardware-level clocking and synchronization is a plus
  • Post-silicon experience developing firmware on real hardware is required; experience with SERDES, DDR, Memory Controller, or MAC Design experience is preferred
  • Strong understanding of computer organization/architecture
  • Laboratory experience, including the use of equipment: oscilloscopes, logic analyzers, etc.
  • Experience with low-level, physical phenomena-oriented logic design is an asset (dealing with IO, clocking, voltage control, etc.)
Education

Bachelor's degree in Electrical or Computer engineering is strongly desired; a Master's or PhD degree is a plus.