Senior FPGA Design Engineer
4 weeks ago
Estimated Salary: $120,000 - $180,000 per year.
Company OverviewVadum is a leading provider of innovative solutions in the field of national defense research and development. With a strong focus on practical innovation, we deliver cutting-edge products and prototypes to address complex challenges in the industry.
We are seeking a highly motivated Senior FPGA Design Engineer to join our team. This role will play an active part in every phase of the FPGA development cycle, including design, installation, and troubleshooting of firmware used to design FPGA-based hardware systems and their components.
Key Responsibilities:- Design, implement, debug, and maintain modules within complex FPGA designs.
- Debug HDL designs within simulation, develop testbenches, and stimulus/emulation logic.
- Meet deadlines and schedule objectives.
- Adapt systems quickly to meet changing business needs.
- Write scripts and conduct testing through root cause analysis and debugging resolution.
- Handle testing, system performance, environmental, and system troubleshooting.
- Understand hardware/software interfaces and collaborate with firmware engineers.
- Maintain and improve existing designs and source code to help attain the goal of a modular structure within a fast-paced, collaborative design environment.
- Use Matlab and other similar tools to generate accurate models, data sets, and coefficients for analysis.
- Bachelor's degree or higher in engineering, computer science, or relevant field required.
- Relevant experience: BS, 6-10 years or MS, 5-8 years or PhD, 4-8 years.
- Maintain US Citizenship.
- Maintain Security Clearance or eligibility to obtain.
- Extensive knowledge of digital hardware.
- In-depth knowledge and use of VHDL, Verilog, and System Verilog HDL languages.
- Experience with Xilinx Vivado FPGA design toolchain, including ILAs, and other hardware debugging tools.
- Good interpersonal and communication skills to work and communicate with internal and external customers.
- Strong analytical thinking skills.
- Strong HDL programming and code writing skills.
- Experience with testing, validation, and debugging tools.
- Experience and know-how to use Matlab and other similar tools to generate accurate models, data sets, and coefficients for analysis.
- Experience with Linux operating procedures is a plus.
- Experience with timing analysis, pipelining, floorplanning, and constraints implementation to close timing within complex FPGA hardware designs is a plus.
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