FPGA Verification Engineer Position
2 days ago
Idaho Scientific is seeking a skilled Verification Engineer to join our team in Boise, Idaho. As a Verification Engineer, you will play a critical role in ensuring the security and reliability of our system solutions.
The ideal candidate will have a strong background in embedded systems design and verification, with experience in constrained-random, directed, and formal verification. You will be responsible for developing and implementing verification plans, participating in product design life cycles, and contributing to new product ideas and proposals.
We offer a competitive salary, flexible work schedule, health benefits, and a generous paid time off policy. If you are a motivated and detail-oriented individual with a passion for solving complex technical problems, we encourage you to apply for this exciting opportunity.
- Key Responsibilities:
- Develop and implement verification plans for Idaho Scientific products and research projects
- Participate in all aspects of product design life cycles, including system architecture, design, development, and verification
- Contribute to new product ideas and proposals
- Distill complex technical concepts into clear and concise writing to support product documentation and proposals
- US Citizenship
- Ability to obtain a security clearance
- More than five years of experience in embedded systems design and verification
- Strong understanding of verification methods, including constrained-random, directed, and formal verification
- Expertise with SystemVerilog and UVM verification languages
- Experience in building verification environments from the ground up and measuring test coverage
- Working knowledge of scripting, specifically 'make' and POSIX, and software modeling
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