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CPU Performance Architect

2 months ago

California, United States Theery Full time
CPU Performance Architect

We are seeking a highly skilled CPU Performance Architect to join our team at Theery. As a key member of our performance team, you will play a critical role in driving innovation and excellence in CPU performance.

Key Responsibilities:
  • Develop and implement performance optimization strategies to improve CPU performance and efficiency
  • Collaborate with cross-functional teams to design and develop high-performance CPU architectures
  • Conduct in-depth analysis of CPU performance data to identify areas for improvement
  • Design and develop performance models to predict and optimize CPU performance
  • Work with RTL and backend teams to implement performance optimization features
  • Develop and maintain technical documentation and knowledge base for performance optimization techniques
  • Stay up-to-date with the latest advancements in CPU architecture and performance optimization techniques
Requirements:
  • Deep knowledge and extensive experience in CPU architecture and microarchitecture as it relates to application and benchmark performance
  • Familiarity with branch prediction algorithms, prefetch algorithms, fusion/fission, issue queue organization, load/store pipelines and value prediction
  • Familiarity with techniques to increase IPC of out of order CPUs
  • Familiarity with code sequences in widely used benchmarks and applications such as SPECInt, SPECFp, TPC-C, Web applications, networking applications and knowledge of microarchitectural techniques to accelerate such sequences
  • Experience developing and enhancing performance models
  • Ability to locate and debug discrepancies between a performance model and observed performance on RTL simulations
  • At least a passing familiarity with code generation by compilers and an ability to identify code generation changes to improve CPU pipeline performance
  • Broad familiarity with published information on CPU microarchitectures from Intel, AMD, Apple, ARM
  • Familiarity with literature on CPU architecture and performance optimization ideas
  • Demonstrated track record of taking a performance feature from conception to implementation
  • Proficiency in C++
  • Experience reading and understanding Verilog code
Preferred Qualifications:
  • Master's or Ph.D. in Computer Science, Electrical Engineering, or related field
  • 5+ years of experience in CPU architecture and performance optimization
  • Experience working with high-performance computing systems and architectures