ASIC Design Engineer
1 week ago
At Apple, we're pushing the boundaries of innovation in mobile computing with our cutting-edge SOC's. As an ASIC Design Engineer - Fabric/Interconnect, you'll play a crucial role in creating the architecture and design for our next-generation on-chip system interconnect bus.
Key Responsibilities:- Analyze architectural requirements for next-gen on-chip fabric and define scalable interconnect components
- Coding high-quality RTL with embedded assertions and cover points
- Writing detailed microarchitectural specifications
- Collaborating with multifunctional teams to explore solutions for improved performance, power, and area
- Working closely with design verification and formal verification teams to debug and verify functionality and performance
- Extensive experience in front-end ASIC RTL digital logic design using Verilog or System Verilog
- Tight-knit collaboration skills with excellent written and verbal communication skills
- Familiarity with multiple power domains, multiple clock domains, and asynchronous interfaces
- Strong understanding of flow control, arbitration, on-chip interconnects, QoS, topology, and performance analysis
- Experience with implementation tasks such as synthesis, timing, area/power analysis, linting, CDC/RDC, logic equivalence checks
- Comprehensive medical and dental coverage
- Retirement benefits
- Range of discounted products and free services
- Reimbursement for certain educational expenses
- Discretionary bonuses or commission payments
Apple is an equal opportunity employer committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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