Senior ASIC/FPGA Design Engineer

6 days ago

Camden, New Jersey, United States L3 Technologies Full time
Job Title:

Sr ASIC/FPGA VHDL Design Engineer

Job Summary:

We are seeking a highly skilled Senior ASIC/FPGA VHDL Design Engineer to join our team. The successful candidate will be responsible for designing and developing high-speed crypto architectures for FPGA/ASICs.

Key Responsibilities:
  • Derive engineering specifications from system requirements and develop detailed architecture
  • Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint)
  • Generate test plans
  • Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards
  • Silicon/FPGA bring up, characterization and production ramp/support/collateral
Requirements:
  • BSEE, MSEE Preferred
  • 5+ year's equivalent experience developing, implementing, and verification of high-performance communications/networking ASIC/FPGA products
  • Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs
  • Proficient with CDC, RDC. Formal EDA
  • Proficient in VHDL is a must
Preferred Skills:
  • Proficiency in C++ (OOP)
  • Proficiency with Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/PetaLinux OS
  • Knowledge of PCIe, NVMe, USB protocols
  • Experience with High level synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto)
What We Offer:

As a Senior ASIC/FPGA VHDL Design Engineer at L3Harris, you will have the opportunity to work on high-impact projects and contribute to the development of cutting-edge technology. We offer a competitive salary and benefits package, as well as opportunities for professional growth and development.

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