AI Architecture Engineer
7 days ago
We are at the forefront of making AI ubiquitous, expanding beyond mobile and powering other end devices, data centers, vehicles, and things.
To achieve this vision, we need talented engineers to drive functional, performance, and power enhancements into our hardware to enable state-of-the-art training capabilities.
Responsibilities:
- Understand trends in ML network design through customer engagements and latest academic research to determine how they will affect both SW and HW design.
- Analyze current accelerator and GPU architectures.
- Design and architect enhancements required for efficient training of AI models.
- Create flexible computational blocks involving a variety of datatypes: floating point, fixed point, microscaling.
- Ensure optimal performance of dense and sparse GEMM, GEMV operations.
- Develop memory technology and subsystems optimized for capacity, bandwidth, compute in memory, and compute near memory requirements.
- Scale-out and scale-up architectures: switches, NoCs, codesign with communication collectives.
Requirements:
- Mastery in Computer Science, Engineering, Information Systems, or related field.
- 3+ years Hardware Engineering experience defining architecture of GPUs or accelerators used for training of AI models.
- In-depth knowledge of nVidia/AMD GPU capabilities and architectures.
- Knowledge of LLM architectures and their HW requirements.
Compensation: $225,000 - $375,000 per annum, plus annual discretionary bonus program and opportunity for RSU grants.
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