Implementation Timing Specialist

4 weeks ago


San Diego, California, United States Qualcomm Full time
Job Summary

We are seeking a skilled engineer to join our Snapdragon implementation team, responsible for SoCs in sub-3nm nodes across mobile, AI, and automotive sectors. The ideal candidate will have at least 2 years of experience in timing constraints development, power analysis, STA, and timing closure for premium-tier chips.

Key Responsibilities
  • Develop constraints for physical power-aware synthesis, setup for various modes/corners and low-power multi-voltage domain crossings, and signoff with static timing analysis.
  • Collaborate closely with RTL design and physical design teams to identify timing requirements and bottlenecks.
  • Generate/review, and validate clock domain crossing and design constraints to achieve timing closure of complex SoC cores.
  • Review and integrate HM constraints into SoC and ensure correlation between HM and SoC timing.
  • Analyze timing across modes and corners, understand concepts like path pessimism and margins.
Requirements
  • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
  • OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
  • OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
What We Offer

Qualcomm is an equal opportunity employer. We offer a competitive annual discretionary bonus program and opportunity for annual RSU grants. Our highly competitive benefits package is designed to support your success at work, at home, and at play.



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