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Mixed Signal Design Verification Engineer

2 months ago


Sunnyvale, California, United States Capgemini Engineering Full time
About the Role

We are seeking a skilled Mixed Signal Design Verification Engineer to join our team at Capgemini Engineering. As a key member of our engineering team, you will be responsible for verifying the design of mixed signal circuits, ensuring they meet the required specifications and performance standards.

Key Responsibilities
  • Develop and execute test plans for mixed signal designs, using system verilog and UVM.
  • Write regression tests for analog behavioral model verification and generate randomized vectors for analog behavioral model verification.
  • Develop checkers and write assertions to ensure the correctness of the design.
  • Collaborate with cross-functional teams to identify and resolve design issues.
Requirements
  • Proficient in system verilog and UVM.
  • Experience with analog behavioral model verification and randomized vector generation.
  • Strong debugging skills and ability to work with gate level parasitic annotated simulations.
  • Excellent communication and teamwork skills.
About Capgemini Engineering

Capgemini Engineering is a world leader in engineering and R&D services, combining its broad industry knowledge and cutting-edge technologies to support the convergence of the physical and digital worlds. We help clients accelerate their journey towards Intelligent Industry, with a focus on innovation, quality, and customer satisfaction.

What We Offer
  • A dynamic and collaborative work environment.
  • Opportunities for professional growth and development.
  • A competitive salary and benefits package.
  • A chance to work on challenging projects and make a meaningful impact.