Physical Design Engineer
2 weeks ago
Job Title: Physical Design Engineer
Job Summary: We are seeking a highly skilled Physical Design Engineer to join our team at Wipro. The ideal candidate will have expertise in RTL synthesis, place and route, timing closure, and floor planning.
Key Responsibilities:
- RTL Synthesis: Utilize tools like Genus (Synthesis), Innovous (PNR), and Fusion Compiler (FC) to synthesize RTL designs.
- Place and Route: Create block closure recipes and work on place and route tasks using Synopsys and Cadence tools.
- Timing Closure: Drive internal and interface timing closure using Tcl and Perl scripting.
- Debugging: Develop strong debugging skills in floor planning, placement, CTS, and routing.
- Domain Knowledge: Possess in-depth knowledge of all domains from RTL to GDS, including working on lower technologies like 16nm/10nm/7nm/5nm process.
Requirements:
- Tool Proficiency: Must have experience working with Synopsys and Cadence tools for PnR & STA and Calibre for PV.
- Block Level Implementation: Must have experience in block-level implementation, with experience in chip-level implementation being a plus.
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San Jose, California, United States Synapse Design Inc. Full time{"Physical Design Engineer at Synapse Design Inc.":{"title":"Physical Design Engineer at Synapse Design Inc.","content":"At Synapse Design Inc., we are seeking an experienced Physical Design Engineer to join our team.Key Responsibilities:10+ years of industry experience requiredExperience with Hierarchical design is a plusExperience with ICC2 or...
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