Mixed Signal Modeling

2 weeks ago

Austin, United States Cirrus Logic Full time
For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce - and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career
DUTIES
  • Electronics engineer performing verification planning and AMS simulation on full custom ASICs for audio processing applications employing knowledge of electronic theory and materials properties; develop behavioral models using SystemVerilog real number modeling (sv-rnm), user-defined types(sv-udt), & Verilog AMS; develop test plans, test benches, and verification methodologies to verify the microarchitecture and design; independent interpretation of analog circuit schematics into abstract models; collaborate with system architects and designers to streamline architectural exploration of next-generation IP; collaborate with UVM verification engineers to ensure all verification components are used for AMS-UVM flow; collaborate with multi-functional teams to streamline chip-level integration; failure analysis and resolution, coverage analysis and population; develop directed/constraint-random test generation, gate-simulations; perform regression debug support and other flow/infrastructure development.
REQUIREMENTS
  • Master of Science in Electrical, Electronics, or Computer Engineering, or a closely related field plus five years of relevant experience. Alternatively, a Bachelor of Science in one of the foregoing fields plus seven years of relevant experience or a PhD in one of the foregoing fields plus three years of relevant experience. In all cases, experience must include one year of experience with analog mixed signal verification and one year of experience with SystemVerilog real number modeling. All experience may be earned concurrently. In addition, in all cases the position also requires: knowledge of IC design sufficient to analyze, simulate and interpret analog circuit design; knowledge of analog mixed signal verification to develop mixed signal test benches and test cases; knowledge of SystemVerilog real number modeling sufficient to code real number behavioral models of analog circuits.
Subject to applicable requirements, Cirrus Logic employee benefits include group health insurance and Progyny fertility coverage, other voluntary insurance options and discounts, an Employee Assistance program (EAP), 401k matching, discretionary bonus and profit-sharing programs, discretionary stock option program, access to the on-site health clinic, and hybrid work arrangement.
CRUS
Diversity drives innovation at Cirrus Logic. Different approaches, ideas and points of view are both valued and respected, and employees are rewarded for their skills, experience and performance. Additionally, Cirrus Logic is an Equal Opportunity/Affirmative Action Employer, and we do not discriminate on the basis of race, color, national origin, pregnancy status, marital status, gender, age, religion, physical or mental disability, medical condition, veteran status, sexual orientation, gender identity, genetic information or any other characteristic protected by law.

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