Design Verification engineer
2 months ago
Title: Design Verification engineer min 10 yeras
Location: Folsom CA
Type: Fulltime
onsite to work or relocate
Key Responsibilities:
Utilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process.
Perform thorough debugging and troubleshooting to identify and resolve issues efficiently.
Conduct full-chip and SoC simulations to validate design functionality and performance.
Demonstrate expertise in subsystem verification, encompassing controllers and PHY components.
Verify bus interfaces, controllers, and PHYs to guarantee seamless integration and functionality.
Ideally, possess experience with subsystems/IPs such as DDR5, LPDDR, PCIe, Ethernet, UCIe.
Diverse Lynx LLC is an Equal Employment Opportunity employer. All qualified applicants will receive due consideration for employment without any discrimination. All applicants will be evaluated solely on the basis of their ability, competence and their proven capability to perform the functions outlined in the corresponding role. We promote and support a diverse workforce across all levels in the company.
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