Foundry Interface Engineer

Overview: PDF Solutions is seeking a Foundry Interface Engineer to join PDF to utilize our eProbe systems for enhancing yield in state-of-art 300mm semiconductor fabs. The consulting engineer must be a highly motivated and a self-driven team player with strong communication skills and possess the drive to deliver quality results on time in a dynamic,...

NVIDIA is searching for a highly motivated, excellent CAD Engineer to join the Advanced Technology Group. You will support installation of foundry techfiles. You will provide expert support to designers in debugging tool, techfile and design errors. And you will develop flows and scripts to improve productivity of custom circuit designers worldwide. A...

NVIDIA is searching for a highly motivated, excellent CAD Engineer to join the Advanced Technology Group. You will support installation of foundry techfiles. You will provide expert support to designers in debugging tool, techfile and design errors. And you will develop flows and scripts to improve productivity of custom circuit designers worldwide. A...

Senior Silicon Reliability Engineer page is loaded Senior Silicon Reliability Engineer Apply locations US, CA, Santa Clara time type Full time posted on Posted 3 Days Ago job requisition id JR1981353 NVIDIA has continuously reinvented itself over three decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern...

We are looking for a skilled design engineers to architect and oversee interfacing our low-speed interfaces to our high-speed interconnect. These blocks include Boot logic, Serial Interfaces, and debug logic Responsibilities Working with a small team to implement, debug, and verify Prodigy’s internal and external buses Building the infrastructure...

** Do Something Wonderful!** Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better...

*Job Title: Senior FPGA Engineer *Location: Santa Clara, CA *Duration: 12 months contract, Full-Time * Employment Type: W-2 Job Description: • Candidate will be responsible for FPGA implementation and create comprehensive functional test plans for the interface validation of IO controllers. • The candidate will execute functional test plans of...

Responsibilities Working with a small team to implement, debug, and verify a high-performance PCIe interface Build the infrastructure to support PCIe during FPGA emulation and bringup Qualifications Requires 10 to 15 years of applicable experience (bright individuals with lower experience can also apply) Experience and background with PCIe...

Note:- Experience must be 7+ Years of Description:Title : Senior FPGA EngineerThe Role : Candidate will be responsible for FPGA implementation and create comprehensive functional test plans for the interface validation of IO controllers. The candidate will execute functional test plans of IP using FPGA hardware & software validation tools, oscilloscopes, &...

Note:- Experience must be 7+ Years of Description:Title : Senior FPGA EngineerThe Role : Candidate will be responsible for FPGA implementation and create comprehensive functional test plans for the interface validation of IO controllers. The candidate will execute functional test plans of IP using FPGA hardware & software validation tools, oscilloscopes, &...

Note:- Experience must be 7+ Years of Description:Title : Senior FPGA EngineerThe Role : Candidate will be responsible for FPGA implementation and create comprehensive functional test plans for the interface validation of IO controllers. The candidate will execute functional test plans of IP using FPGA hardware & software validation tools, oscilloscopes, &...

Test Engineers perform a wide variety of product testing based on customer specifications and compile the reports from each test. In addition, they are responsible for calibration of equipment, some customer communication, and other duties as assigned.ResponsibilitiesInterface with customerPerform tests and compile results Become knowledgeable in various...

Test Engineers perform a wide variety of product testing based on customer specifications and compile the reports from each test. In addition, they are responsible for calibration of equipment, some customer communication, and other duties as assigned.ResponsibilitiesInterface with customerPerform tests and compile results Become knowledgeable in various...

Duration: 12 months contract, Full-TimeEmployment Type: W-2Job Description:• Candidate will be responsible for FPGA implementation and create comprehensive functional test plans for the interface validation of IO controllers.• The candidate will execute functional test plans of IP using FPGA hardware & software validation tools, oscilloscopes, & logic...

Duration: 12 months contract, Full-TimeEmployment Type: W-2Job Description:• Candidate will be responsible for FPGA implementation and create comprehensive functional test plans for the interface validation of IO controllers.• The candidate will execute functional test plans of IP using FPGA hardware & software validation tools, oscilloscopes, & logic...

Are you an experienced DFT Engineer with a desire to excel? If so, then Talent Software Services may have the job for you! Our client is seeking an experienced DFT Engineer to work at their company in Santa Clara, CA.Primary Responsibilities/Accountabilities:Stitching multiple scan chains across different IP(mixed signal) and clock domains.Scan vectors...

Job Description The mission of this role is to architect and develop firmware and microcontroller subsystems for Astera Labs’ SoC and systems products. Firmware is responsible for implementing the major differentiating features of Astera Labs’ products. As such, firmware is considered equally important to the hardware, and the firmware team is often...

Looking to add DV Engineers in Irvine, San Diego and Santa Clara.On going needs additional 10 engineers in team.Position detail: SOC verificationExperience level : 5-20 yearsArchitect block and full-chip verification environments using HVLs and constrained randomtechniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog,...

Looking to add DV Engineers in Irvine, San Diego and Santa Clara.On going needs additional 10 engineers in team.Position detail: SOC verificationExperience level : 5-20 yearsArchitect block and full-chip verification environments using HVLs and constrained randomtechniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog,...

Looking to add DV Engineers in Irvine, San Diego and Santa Clara.On going needs additional 10 engineers in team.Position detail: SOC verificationExperience level : 5-20 yearsArchitect block and full-chip verification environments using HVLs and constrained randomtechniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog,...