Design Verification Engineer

4 weeks ago


New York, United States Synapse Design Full time

Key responsibilities: · 5+ years of working experience in Design verification. · Pre-Silicon IP validator for USB IP · The works involved subsystem-level verification. · Knowledge in test plan writing, writing tests in UVM and System Verilog, · Able to debug RTL issues, coverage writing and SVA, waveform debug using Verdi.

If you're interested, please share your resume on sachin.verma@quest-global.com



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