Senior Formal Hardware Verification Engineer

4 weeks ago

New York, United States Correct Designs Full time

Senior FormalVerification Engineer

Looking for new challenges? Would you like the variety of a contract positionalong with long term stability and benefits? Correct Designs can give it all to you.

Correct Designs is currently seeking talented Formal Verification Engineers with experience working with a formal verification tool: Cadence Jasper, Mentor Quest FV or Synopsys VC Formal (Hector). Correct Designs has opportunities in a wide range of products includingprojects in AI and Machine Learning, processor fabric subsystems,SOC/ASICproducts for vision processing, aerospaceFPGAs, medical electronics, RISC-V based SoC,ARM based peripherals,and mixed signalDSPs. Successful candidates for this role will supportverification of advanced CPU/GPU based SOCs.

Correct Designs is NOT the typical contracting, staff augmentation firm. Our engineers have respected long term roles with generoushourly rates in excellent team environments. A typical contract may last 3 years, although we have shorter and even longer term work available. We are well respected in the Design Verification community with clients always seeking new CDI engineers. If you need a few months off between contracts you can take that break and know there will be plenty of work available when you return. If you like the stability of always working, simply move to the next contract with little time off. Correct Designs does provide health care and retirement plan benefits.

We are based in Austin, Texas with clients throughout the US. This position is locatedin Austin, TX. We would prefer someone located in Austin, TX, but we are open toremote work.

Whether you are an experienced veteran looking for new challenges, or a talented engineer seeking to broaden your experience, we can offer exciting options for your career.

RESPONSIBILITIES:

Verify complex design blocks formal verification methods

Develop and execute pre-silicon verification test plans

Develop directed and random verification tests to validate block and IP functionality

Develop verification components and tools

Develop verification functional coverage using industry standard coverage analysis tools/methods

Debug regression fails

Replicate functional issues found in external environments or post-silicon; review/enhance tests to verify bug fixes

REQUIRED SKILLS AND EXPERIENCE:

8 or more years of proven verification experience in a hardware development setting

Strong background in Formal verification methodologies

Strong debug skills and experience with debug tools such as DVE/Verdi

Proficiency in Object Oriented programming, computer architecture and data structures

Strong analytical/problem solving skills and pronounced attention to details

Strong interpersonal and communication skills

Must be comfortable working across geographies

DESIRED SKILLS:

Experience architecting/developing verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar

Experience in other related domainssuch as formal verification, RTL design, or software development

EDUCATION:

Bachelor or Master's in Electrical Engineering, Computer Engineering, or Computer Science

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