Engineer/Staff Engineer

1 month ago


Emory, United States MediaTek Full time

Job Description

• Responsible for Full-chip Physical Verification Sign-off in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.

• Co-work with Place & Route team to resolve full-chip layout integration issues.

• Coordinates with internal IP owners on IP related issues.

• Coordinates with Manufacturing Team on DRC related issues.

• Provide automation solutions to improve efficiency in tape-out flow.

• Report on tapeout issues.

• Co-work with PDK team to code and maintain DRC/LVS/ANT/ERC/LPE/ESD rule deck for various processes.

• Develop layout implementation flow and physical verification flow.

• Co-work with QA team to reduce the PDKs/Rule deck defects.

• Implement automation scripts in C-shell and Perl.

Requirement

• Bachelor/Masters Degree in Electrical/Electronics Engineering / Computer Science.

• Familiar with IC Design front-to-backend flow.

• Preferably well-versed in Calibre, Assura, Star-RCXT.

• Proficient in script programming, such as, Tcl, Perl or C-shell.

• Proficient in UNIX (Linux) platforms.

• Strong communication skills, problem solving and analytical skills.

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