Senior Physical Design Engineer, Autopilot AI

1 month ago


Stanford, United States Tesla Full time

**Senior Physical Design Engineer, Autopilot AI (Dojo)**

????Engineering & Information Technology????Palo Alto, California?? ID98124????Full-time Responsibilities

* The candidate will be responsible for leading and driving large designblocks from early design stage to tape out.

* Work responsibilities include synthesizing extremely high speed designs, following through with Place and Route and analyzing design results, and making changes to the RTL code as needed.

* Should be able to read RTL and understand the micro architecture of the blocks if needed perform RTL modifications

* Should be able to partition, floorplan, do LEC at the SoC level designs

Preferred Experience

* VLSI/IC design experience in a professional environment

* Knowledge of Logic Design and Synthesis

* Key electrical analysis like IR drop/EM and timing analysis concepts

* Auto P&R background and skills

* Experience with Timing Closure, Circuit Design, Electrical Closure, and Memory Compiler Work

* Proven understanding of RTL, microarchitecture, Physical DesignCAD tools and scripting languages (Perl or Python)

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Tesla ?????????????????????????????????????????????????????????????????????

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Tesla ?????????????????????????????????????????????????????????????????????????????????????????????????????????????????

**Senior Physical Design Engineer, Autopilot AI (Dojo)**

???? Engineering & Information Technology ???? Palo Alto, California ?? ID 98124 ???? Full-time Responsibilities

* The candidate will be responsible for leading and driving large designblocks from early design stage to tape out.

* Work responsibilities include synthesizing extremely high speed designs, following through with Place and Route and analyzing design results, and making changes to the RTL code as needed.

* Should be able to read RTL and understand the micro architecture of the blocks if needed perform RTL modifications

* Should be able to partition, floorplan, do LEC at the SoC level designs

Preferred Experience

* VLSI/IC design experience in a professional environment

* Knowledge of Logic Design and Synthesis

* Key electrical analysis like IR drop/EM and timing analysis concepts

* Auto P&R background and skills

* Experience with Timing Closure, Circuit Design, Electrical Closure, and Memory Compiler Work

* Proven understanding of RTL, microarchitecture, Physical DesignCAD tools and scripting languages (Perl or Python)



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