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Principal MMIC Design Engineer
2 months ago
Qualifications
Responsibilities
ESSENTIAL FUNCTIONS and DUTIES: Perform line-up analysis, floor planning, FET device selection, and circuit topology studies necessary to meet customer requirements. Perform circuit simulation, analyses, and layout as part of the design flow methodology. Perform circuit modeling and simulations using foundry PDK models (linear, non-linear, and EM). Perform 3D modeling and simulations for packaging MMIC's; work with drafters and PCB designers to develop packages and/or multi-chip modules. Perform simulations using Cadence/AWR AXIEM 3D planar EM and Analyst 3D FEM tools. Perform analyses required to achieve reliability & manufacturing compliance. Prepare for design reviews and preparing for manufacturing and test readiness. Perform RF/Microwave measurements in the lab using PNA-X and related equipment. Lead Engineer to assist in planning, reporting, and meeting performance, cost, and schedule objectives on programs. Identify & initiate improvements in the design methodology flow. Engage and forge relationships with foundries, advanced process & packaging suppliers, in order to advance CAES MMIC capabilities. Assist in business development pursuits to help shape customer requirements and system architecture trades. Technical lead role; prepare flow-down specifications and floor planning requirements; prepare project status to Program Management and Engineering Manager. Assist in IR&D roadmaps and lead IR&D projects. Identify and contribute in continuous improvement initiatives. Assist in technical write-ups for proposals and white papers. Mentoring Engineers. Support Engineering team in customer support activities and preparing technical reports. Lead and collaborate team meetings and activities. May be Customer focused; assist customers with trade-offs to assist in defining MMIC specifications. May be Lead Engineer on the most challenging problems to solve and act as MMIC SME across other CAES sites as needed. May Lead IR&D foundry capabilities assessment activities.
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