I/O Subsystem Design lead

3 weeks ago

Bapchule AZ United States ARM Full time
Job Overview:

Are you ready for a new and exciting challenge? If you are a self-motivated design engineer with expertise in micro-architecture, logic design and PCIe and looking to make a difference in an innovative and inclusive team, you’ve come to the right place

 

In your new job as a IO Design lead, you will be at the forefront of developing sophisticated IO interfaces for high-performance computing environments. Your role will focus on designing IO subsystems that are integral to the functionality and efficiency of server-grade SoCs used in data centers.

Responsibilities:
  • High-Performance IO subsystem Design: Develop and implement sophisticated IO interfaces specifically for server and data center SoCs, ensuring high data efficiency, low latency, and scalability.
  • Integration with Server-Grade SoCs: Collaborate with SoC architects to integrate IO interfaces within sophisticated server-grade SoC designs, ensuring compatibility with high-end CPUs, memory systems, and network interfaces.
  • Performance Optimization for Data Centers: Optimize IO interfaces for the unique needs of data centers, focusing on robustness, energy efficiency, and high-speed data transfer capabilities.
  • Advanced Testing and Compliance: Conduct extensive testing under data center conditions and ensure compliance with stringent industry standards relevant to server and data center environments.
  • Troubleshooting in High-Performance Systems: Provide expert-level troubleshooting and problem-solving for PCIe-related issues in server & data center SoCs.
  • Technical Leadership and Documentation: Lead IO interface design projects, mentor junior engineers, and maintain comprehensive documentation tailored to high-performance computing environments.
  • Cross-Functional Collaboration: Work closely with teams across hardware, software, and physical design to ensure comprehensive design and implementation.
Required Skills & Experience :

In addition to bringing your accomplishment of either BS/MS in Computer Science or Electrical/Computer Engineering or a similar related field, you will need:

  • Extensive experience in IO interface design, specifically within server & data center SoC environments. You will also need strong experience with hardware simulation, validation tools, and IO compliance testing.
  • Proficient in high-speed digital design, hardware description languages (Verilog/VHDL), and digital logic design.
  • In-depth understanding of server-grade SoC architectures and the specific requirements of data center applications.
  • Outstanding analytical, troubleshooting, and problem-solving skills.
“Nice To Have” Skills and Experience :
  • Prior experience of at least 5+ years in a lead role on large-scale server or data center hardware projects.
  • Experience with Arm-based designs and/ore Arm System Architectures
  • Knowledge of advanced computing concepts such as virtualization, multi-tenancy, and cloud computing infrastructures.
  • Familiarity with data center networking standards and protocols.
  • Excellent communication, leadership, and teamwork abilities
In Return:

This position offers an incredible opportunity to join a growing, highly influential organization at the center of one of the most exciting markets and to lead from the front as the organization engages in a more sophisticated way.

We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together. These behaviors are assessed as part of the hiring process:

  • Partner and customer focus
  • Teamwork and communication
  • Creativity and innovation
  • Team and personal development
  • Impact and influence
  • Deliver on your promises

We offer a hybrid approach to home and office working to provide an adaptable experience for all employees. We expect some working time to be spent in office, to promote a strong collaborative environment with good team integration but are accommodating to different home working requirements.

 

#LI-SA1

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