Hardware Engineer

2 weeks ago


San Jose, United States Fusion Life Sciences Technologies LLC Full time

Job Title: Contract Hardware Engineer Mid.
Duties: Location: San Jose CA (Open for Remote Candidates)
Experience: 8+ Years

Key Responsibilities

- Develop and implement comprehensive DFT architectures tailored to specific design requirements.
- Design and implement robust DFT infrastructure, including scan chains, BIST, and other test mechanisms.
-Generate high-quality test vectors and analyze DFT coverage to ensure thorough fault detection.
-Verify test patterns using gate-level simulations to identify and address any functional issues.
-Collaborate closely with STA, physical design, and power engineers to debug and resolve DFT-related problems.
- Work in partnership with test engineers to bring up test vectors on silicon and ensure successful testing.

Preferred Qualification
- Strong understanding of industry standards and best practices in DFT, ATPG, JTAG, and MBIST.
- Proven experience in developing DFT specifications and architectures for complex designs.
- Expertise in debugging DFT issues, including ATPG patterns, MBIST implementations, coverage analysis, and more.
- Proficiency in Cadence tools like Modus and Genus for DFT implementation, vector generation, and verification.
- Ability to conduct experiments during silicon debug, effectively gather and analyze data to identify root causes.
- Efficient scripting skills using TCL for automating tasks and developing custom flows.

Required Skills:
DEBUG
SIMULATIONS
JTAG
CADENCE
PHYSICAL DESIGN



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