Senior Engineering Associate

4 weeks ago


Minneapolis, United States eTeam Full time

Job description:-

All potential candidates should read through the following details of this job with care before making an application.
  • This role is similar to RTL Design Engineer role
  • Min 5-10+ years of experience applying digital design principles in SoC and/or IP development.
  • Experience with DO 254 life cycle data and certification
  • Experience with DO 254 ASIC design/development
  • Good to have experience with DDDR2/DDR3 implementation, DES-SERDES experience
  • Proficient in Verilog/System Verilog coding constructs
  • Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting)

Education:

  • BE/ME/MTECH


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