Electrical Design Verification Test Engineer

Arista Networks is an industry leader in data-driven, client to cloud networking for large data center, campus and routing environments. Our switch systems have touched every corner of the market - from the data centers of the world’s largest cloud-computing companies to your local university’s server room, and every application in between. We design...

Arista Networks is an industry leader in data-driven, client to cloud networking for large data center, campus and routing environments. Our switch systems have touched every corner of the market - from the data centers of the world’s largest cloud-computing companies to your local university’s server room, and every application in between. We design...

Job Description We are seeking candidates who take pride in driving and sustaining product development through manufacturing. This team is the Electrical Design Validation Testing team, responsible for ensuring functionality of electrical components of Arista products. This role will be responsible for writing software scripts that automates the testing of...

Looking to add DV Engineers in Irvine, San Diego and Santa Clara.On going needs additional 10 engineers in team.Position detail: SOC verificationExperience level : 5-20 yearsArchitect block and full-chip verification environments using HVLs and constrained randomtechniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog,...

Looking to add DV Engineers in Irvine, San Diego and Santa Clara.On going needs additional 10 engineers in team.Position detail: SOC verificationExperience level : 5-20 yearsArchitect block and full-chip verification environments using HVLs and constrained randomtechniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog,...

Looking to add DV Engineers in Irvine, San Diego and Santa Clara.On going needs additional 10 engineers in team.Position detail: SOC verificationExperience level : 5-20 yearsArchitect block and full-chip verification environments using HVLs and constrained randomtechniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog,...

Looking to add DV Engineers in Irvine, San Diego and Santa Clara. Make sure to apply quickly in order to maximise your chances of being considered for an interview Read the complete job description below. On going needs additional 10 engineers in team. Position detail: SOC verification Experience level : 5-20 years Architect block and full-chip...

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with...

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with...

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with...

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by...

Role/Responsibilities: You will work closely with the design team to define strategy and requirements for block-level and chip-level testing infrastructure. With a thorough understanding of design intent, you will drive the verification environment and the creation of test plans for unit-level and chip-level verification, implement test benches and test...

Role/Responsibilities: You will work closely with the design team to define strategy and requirements for block-level and chip-level testing infrastructure. With a thorough understanding of design intent, you will drive the verification environment and the creation of test plans for unit-level and chip-level verification, implement test benches and test...

Senior Design Verification Engineer Santa Clara CA Experience Level: 7-15 years. JOB DESCRIPTION 1 Knowledge of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc. Strong HVL (UVM or SystemVerilog with OVM), C/C++, Perl, TCL programming skills. Good knowledge of EDA tools. Experience with signal...

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with...

Senior Design Verification EngineerSanta Clara CAExperience Level: 7-15 years. JOB DESCRIPTION 1Knowledge of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc.Strong HVL (UVM or SystemVerilog with OVM), C/C++, Perl, TCL programming skills.Good knowledge of EDA tools. Experience with signal...

Senior Design Verification EngineerSanta Clara CAExperience Level: 7-15 years. JOB DESCRIPTION 1Knowledge of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc.Strong HVL (UVM or SystemVerilog with OVM), C/C++, Perl, TCL programming skills.Good knowledge of EDA tools. Experience with signal...

Design Verification is an integral part of the chip design process that ensures our customers get the absolute highest quality products that meets their functional and performance requirements. The DV team at Ampere Computing comprises of stellar folks who have dedicated themselves to the art and fun of design verification. We are a tightly knitted,...

JOB TITLE: Accelerator Verification Engineer LOCATION: (US) Santa Clara CA , Austin TX, Portland OR, Fort Collins CO QUALIFICATIONS: Join a cutting-edge hardware startup in Silicon Valley as a Silicon Verification Engineer. Our mission is to reimagine silicon and create Risc-V based computing platforms that will transform the industry. You will have the...

JOB TITLE: Accelerator Verification EngineerLOCATION: (US) Santa Clara CA , Austin TX, Portland OR, Fort Collins COQUALIFICATIONS:Join a cutting-edge hardware startup in Silicon Valley as a Silicon Verification Engineer. Our mission is to reimagine silicon and create Risc-V based computing platforms that will transform the industry. You will have the...