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ASIC Design Verification Engineer
5 days ago
Key Responsibilities:
- Collaborate with the ASIC team to understand and verify the functions and requirements of our designs.
- Develop detailed verification plans based on specifications.
- Create verification environments using industry-standard verification languages such as SystemVerilog.
- Implement block-to-top UVM constrained random environments.
- Utilize best practices methodology for functional coverage, assertions, debug, and formal verification.
- Work closely with digital design engineers to achieve comprehensive functional and code coverage metrics.
- Support post-silicon lab validation efforts and handoff.
- Automate processes and methodologies using scripting languages such as Python.
- Other duties as assigned.
Qualifications:
- Bachelor's degree in computer engineering, electrical engineering, or computer science.
- Relevant prior experience working as an ASIC Design Verification Engineer.
- Experience with UVM or object-oriented programming is a plus.
- Clearance: This position requires a US government security clearance. As such, US citizenship is required.
Nice to Have:
- Master’s degree in computer engineering, electrical engineering, or a related field.
Benefits:
- Work-life balance: Flexible 9/80 Work schedules with every other Friday off, hybrid work with primary location being in St. Paul, MN
- Competitive benefit package: Including options for healthcare and medical coverage, 401K Retirement Benefits with company contribution, as well as a generous holidays and PTO allotment. Selected candidate may also be eligible for short-term and long-term incentives.
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