FPGA Design Verification Engineer
2 months ago
Job description: FPGA Design Verification Engineer
Responsibilities and Duties:
As a key member of our FPGA team, you will play an important role in verifying the design and implementation of the industry's leading network monitoring devices.
• Responsible for hands-on verification of FPGA designs using state of the art verification methodologies such as UVM.
• Architect and develop testbench components in SystemVerilog UVM environment.
• Write constrained random tests and execute test plans for design under test.
• Debug failures and root cause issues.
• Perform coverage analysis and drive to coverage closure.
• Integrate verification into continuous integration flow and into CI tools like TeamCity.
• Work closely with the Software and QA teams to plan and prioritize tasks.
• Mentor junior engineers and interns.
Qualifications and Skills:
• Bachelor's degree in EE/CS/CE or equivalent, with 7+ years of relevant experience, or Master’s degree in EE/CS/CE or equivalent, with 5+ years of relevant experience
• UVM and SystemVerilog expertise.
• Networking and packet processing experience preferred.
• Strong debugging, troubleshooting and analytical skills.
• Strong communication skills and collaborative attitude.
• Self-starter, and motivated to champion continuous improvement and positive team culture.
• Python experience is desirable.
-
Senior Engineer, FPGA Verification
2 weeks ago
San Jose, United States Conductor Full timeWhat You’ll Do The Memory Solutions Lab (MSL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash, and SRAM memory. MSL's vision is to solve key problems and optimize architecture solutions for Cloud & Data center environments. We are integral to Samsung's strong R&D focus & lab innovation engine. We...
-
Senior Engineer, FPGA Verification
2 days ago
San Jose, United States Conductor Full timeWhat You’ll Do The Memory Solutions Lab (MSL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash, and SRAM memory. MSL's vision is to solve key problems and optimize architecture solutions for Cloud & Data center environments. We are integral to Samsung's strong R&D focus & lab innovation engine. We...
-
FPGA Engineer
4 weeks ago
San Jose, United States EndoSec LLC Full timeDescription FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development, testing, and maintenance of IP cores and FPGA-based systems used in hardware security applications. Key ResponsibilitiesFPGA Design and Development: Design and develop IP cores and FPGA configurations implementing the latest in leakage-resilient hardware...
-
Design Verification Engineer
4 weeks ago
San Jose, United States Theery Full timeCompany Description: We are a cutting-edge technology company specializing in the development of advanced ASIC designs for various applications. Our team is composed of innovative individuals dedicated to pushing the boundaries of what's possible in the semiconductor industry. We are currently seeking a skilled Design Verification Engineer to join our...
-
Design Verification Engineer
4 weeks ago
San Jose, United States Theery Full timeCompany Description: We are a cutting-edge technology company specializing in the development of advanced ASIC designs for various applications. Our team is composed of innovative individuals dedicated to pushing the boundaries of what's possible in the semiconductor industry. We are currently seeking a skilled Design Verification Engineer to join our...
-
Design Verification Engineer
3 weeks ago
San Jose, United States Theery Full timeCompany Description: We are a cutting-edge technology company specializing in the development of advanced ASIC designs for various applications. Our team is composed of innovative individuals dedicated to pushing the boundaries of what's possible in the semiconductor industry. We are currently seeking a skilled Design Verification Engineer to join our...
-
Senior Design Verification Engineer
3 weeks ago
San Jose, United States Mirafra Technologies Full timeArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM ○ Debug RTL and Gate simulations and work with design...
-
San Jose, United States Cadence Design Systems Full timeAt Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Join our elite application engineering team for verification to work closely with the best AEs, PEs and R&D in EDA at a company listed in Fortune magazine and Great Place to Work as one of the 2023 World's Best Workplaces for the sixth time! As an...
-
San Jose, United States Cadence Design Systems Full timeAt Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Join our elite application engineering team for verification to work closely with the best AEs, PEs and R&D in EDA at a company listed in Fortune magazine and Great Place to Work as one of the 2023 World's Best Workplaces for the sixth time! As an...
-
FPGA Design Engineer
1 week ago
San Jose, United States Teradyne Full timePress Tab to Move to Skip to Content Link Select how often (in days) to receive an alert: Date: May 4, 2024 Location: Tualatin, OR, US San Jose, CA, US We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device...
-
FPGA Design Engineer
16 hours ago
San Jose, United States Teradyne Full timePress Tab to Move to Skip to Content Link Select how often (in days) to receive an alert: Date: May 4, 2024 Location: Tualatin, OR, US San Jose, CA, US We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device...
-
Design Verification Engineer
3 days ago
San Jose, United States Synapse Design Full timeSynapse ( A Quest Global Company) is seeking talent for mixed signal design verification engineer job position. Below is the job description :: Title :: Analog Mixed Signal Design Verification Engineer Location :: San Jose,CA Staff Verification with a some design experience. 8+ years of practical design and verification experience using SystemVerilog...
-
Senior Design Verification Engineer
2 months ago
San Jose, United States Mirafra Technologies Full timeArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM ○ Debug RTL and Gate simulations and work with...
-
Senior Design Verification Engineer
1 month ago
San Jose, United States Mirafra Technologies Full timeArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design...
-
Senior Design Verification Engineer
2 months ago
San Jose, United States Mirafra Technologies Full timeArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM ○ Debug RTL and Gate simulations and work with...
-
CPU Design Verification Engineer
1 week ago
San Jose, United States Prodapt Full timeOverview Prodapt ASIC services (formerly Innovative Logic) is the leading provider of SoC ASIC/FPGA and Embedded Software services. Our business model is to offer our services based on turnkey, Offshore design center (ODC) or staff augmentation. We're seeking a passionate Verification Engineer with a strong background in UVM-based verification and experience...
-
Emulation or FPGA Prototyping
4 weeks ago
San Jose, United States Cadence Design Systems Full timeAt Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Join our elite application engineering team for verification to work closely with the best AEs, PEs and R&D in EDA at a company listed in Fortune magazine and Great Place to Work as one of the 2023 World's Best Workplaces™ for the sixth time! As an...
-
Emulation or FPGA Prototyping
2 days ago
San Jose, United States Cadence Design Systems Full timeAt Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Join our elite application engineering team for verification to work closely with the best AEs, PEs and R&D in EDA at a company listed in Fortune magazine and Great Place to Work as one of the 2023 World's Best Workplaces™ for the sixth time! As an...
-
San Jose, United States Cadence Design Systems Full timeAt Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Join our elite application engineering team for verification to work closely with the best AEs, PEs and R&D in EDA at a company listed in Fortune magazine and Great Place to Work as one of the 2023 World's Best Workplaces™ for the sixth time! As an...
-
San Jose, United States Cadence Design Systems Full timeAt Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Join our elite application engineering team for verification to work closely with the best AEs, PEs and R&D in EDA at a company listed in Fortune magazine and Great Place to Work as one of the 2023 World's Best Workplaces™ for the sixth time! As an...