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Sr. ASIC Design Engineer

3 months ago


San Jose, United States Theery Corporation Full time

Overview: We are seeking a highly skilled Senior ASIC Design Engineer with specialized expertise in NAND memory controller and SoC development. This role is pivotal in our engineering team, focusing on designing and implementing advanced ASIC solutions for cutting-edge memory technologies and complex System-on-Chip (SoC) architectures.

Responsibilities:

  1. ASIC Design and Integration:
  • Lead the design and integration of ASIC components, with a focus on NAND memory controllers and interfaces.
  • Architect and implement SoC designs, integrating memory subsystems with peripheral components.
  • Ensure adherence to design specifications, performance targets, and power constraints.
  1. RTL Design and Verification:
  • Develop and optimize RTL designs for ASICs, including NAND memory controllers and associated logic.
  • Conduct functional verification and validation of RTL designs using industry-standard methodologies.
  • Collaborate closely with verification and validation teams to achieve comprehensive coverage and reliability.
  1. Synthesis, Timing Closure, and DFT:
  • Perform synthesis and timing closure for ASIC designs, optimizing performance and area efficiency.
  • Implement Design-for-Test (DFT) techniques to ensure high testability and manufacturing readiness.
  • Collaborate with physical design teams to resolve timing issues and achieve design closure.
  1. Design Methodology and Tools:
  • Drive the adoption and enhancement of design methodologies and best practices for NAND memory controllers and SoCs.
  • Evaluate and deploy EDA tools and flows to streamline design, verification, and implementation processes.
  • Stay updated with industry trends and advancements in ASIC design and memory technologies.
  1. Documentation and Collaboration:
  • Generate design documentation, including specifications, design reviews, and technical reports.
  • Collaborate effectively with cross-functional teams including architecture, software, and verification teams.
  • Provide technical guidance and mentorship to junior engineers and contribute to their professional development.

Qualifications:

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field (Master’s degree preferred).
  • 5+ years of industry experience in ASIC design, specializing in NAND memory controllers and SoC development.
  • Proven track record of successfully delivering complex ASIC designs from concept to production.
  • Expertise in RTL design using Verilog/SystemVerilog and proficiency with ASIC design tools (Synthesis, STA, DFT).
  • Experience with memory subsystems, NAND flash interfaces, and memory controllers.
  • Strong understanding of SoC architectures, bus protocols (e.g., AXI, AHB), and system-level integration.
  • Familiarity with industry standards and protocols relevant to memory interfaces and storage technologies.
  • Excellent problem-solving skills, attention to detail, and ability to work effectively in a team environment.
  • Strong communication skills and ability to collaborate with diverse teams in a dynamic work environment.