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Digital Design Engineer
2 months ago
Summary:
Meta Platforms, Inc. (Meta), formerly known as Facebook Inc., builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps and services like Messenger, Instagram, and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. To apply, click “Apply to Job” online on this web page.
Required Skills:
Digital Design Engineer Responsibilities:
Design and develop state-of-the-art SoC’s, and digital logic IC’s to drive virtual and augmented reality systems.
Contribute to the development of efficient micro-Architectures and ASIC digital micro-Architecture, design and verification.
Understand in-house IPs their integration, connection, and verification.
Drive top-level micro-Architecture definition and develop necessary RTL.
Drive chip-level integration, verification plan development and verification.
Supervise RTL-to-GDS flow and assist with synthesis and timing closure.
Support the test program development, chip validation and chip life until production maturity.
Work with FPGA engineers to perform early prototyping.
Support hand-off and integration of blocks into larger SOC environments.
Assist with algorithm analysis, verification and improvement.
Minimum Qualifications:
Minimum Qualifications:
Requires a Master’s degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and three years of work experience in job offered or in a digital design or design engineer-related occupation.
Requires three years of experience in the following:
- RTL coding and Logic simulation
- Digital design, micro architecture, or VLSI structural design
- SystemVerilog or Verilog Hardware description languages
- Python, Perl, or similar scripting language
- ASIC Design Methodology
- Low power design techniques such as clock gating, power gating, memory retention or power-down power states
- Digital waveform analysis and C-model based verification of digital circuits.
Public Compensation:
$200,987/year to $234,520/year + bonus + equity + benefits
Industry: Internet
Equal Opportunity:
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com.