DFT Engineer

3 weeks ago

Milpitas California, United States Park Lane Recruitment Ltd Full time
-DFT ENGINEER (DESIGN FOR TEST)

-CALIFORNIA
-USA

JOB DESCRIPTION:

We are seeking a highly skilled DFT Engineer to join ourclient that develops and delivers ASIC and SoC solutions to customers worldwide in some of the hottest technology areas.If you are a hands-on DFT Engineer with strong tools and testing skills and can be client facing, wed like to speak with you.

PRIMARY SKILLS:Dft, Lbist, Mbist, Verification, Test, Verilog

SECONDARY SKILLS:ASIC

EMPLOYMENT TYPE:Full Time/Direct Hire

LOCATION:Milpitas, California

WORK EXPERIENCE (YEARS):8 15

REMOTE STATUS:Partially Remote

CLIENT WILLING TO SPONSOR: NO

PRIMARY RESPONSIBILITIES:

* Support and work closely with customers on in-system test using LBIST & MBISTand in defining DFT requirements and specifications for the ASIC
* Design and Verification of DFT logic and components
* Generation of structural test vectors, analysis, and coverage improvement
* Generation of timing constraints for the various DFT modes
* Work with implementation teams on DFT STA, logical, physical, and power issues
* Support ATE team with test vector porting, diagnosis, and physical failure analysis

REQUIRED/DESIRED QUALIFICATIONS:

* BS/MS in Electrical Engineering, Computer Science, or related field
* Prefer minimum of 10 years hands-on work experience in ASIC DFT design. Experience in an SoC product development organization or in an ASIC vendor company along with customer facing experience preferable
* Hands-on experience with DFT circuit insertion and validation for scan, at-speed, MBIST and Boundary scan
* Experience with Industry standard DFT/ATPG EDA tools like Tessent / TestMax/Modus. Experience with simulators and waveform debug tools.
* Strong knowledge of DFT methodologies, industrial standards, and practices
* Strong working knowledge of Chip design, Verilog/System Verilog, and design verification
* Experience with STA tools like Primetime, SDF generation and Gate-level simulations
* Understanding and expert handling of Verilog HDL based Netlists, design libraries and Scripting (Perl/TCL)

DEGREE:University - Bachelor's Degree/3-4 Year Degree

SALARY DETAILS:
Pay Rate:-
Other Compensation:12-15% bonus

Please send me your resume if you are interested. Do refer if any of your friend is looking for Job change.

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