Senior Digital Design Engineer

7 hours ago

Boston, Massachusetts, United States Riverlane Full time

Boston, USA | Full-time | Permanent | HybridSalary: $142,000 - $170,000 USD (DOE) + bonus plan + equityThe salary range for this role is broad, as we are able to consider varying levels of experience.  Any offer made will carefully take into account level of experience (including relevant industry experience), transferable relevant skills and previous relevant achievements.About usRiverlane's mission is to make quantum computing useful, sooner. From advances in material science to complex chemistry simulation for drug design and discovery, quantum computers will help solve some of the world's most important challenges. Riverlane is building the quantum error correction stack, Deltaflow, to make this happen. It's a complex problem that requires a range of skills, talent and passion.We recently raised $75M in Series C funding  to accelerate our cutting-edge R&D in quantum error correction (QEC), and are partnering with many of the world's leading quantum hardware providers and government agencies to make fault-tolerant quantum computing a reality. We're making remarkable progress and growing fast.About the roleWe have a fantastic opportunity for an experienced Senior level Digital Design Engineer to join us as we build the world's first quantum error correction (QEC) stack.  Don't have a background in quantum computing?  Not a problem  This cutting-edge technology requires a wide range of skills and disciplines, including classical computing skills.  You will learn quantum computing along the way.As Senior Digital Design Engineer at Riverlane, you will help develop our decoder IP, at the heart of our QEC Stack.  You will use your knowledge and expertise to support more junior engineers, interact with software and identify novel solutions to our challenging problems.Our mission is exciting, but complex.  It requires teams with a wide range of skills and perspectives, that communicate well and collaborate effectively to achieve truly innovative solutions.You will thrive in an environment where knowledge sharing, and continuous learning are the norm.  We are moving fast in a brand new market, where requirements can change as the technology evolves, so the ability to adapt is important.What you will doAs a Senior Digital Design Engineer at Riverlane, you will work on one of these key areas:Implementation of QEC decoders on hardware;Implementation of low-latency, high throughput data movement between cards and IPs; orDesign of low-latency interfaces to bring data in the systems.Mentor junior engineers (not a manager role-no direct reports)In all of the above, you will (often from scratch) design end to end or integrate complex IPs and develop tests, collaborating closely with our Software, Verification and Testing experts to deliver an outstanding product.RequirementsWhat we need5+ years of end to end design experience with complex, state-of-the-art FPGA platforms (e.g. AMD/Xilinx MPSoCs/RFSoCs, Altera Stratix 7 or Stratix 10) REQUIREDExperience with ASIC environments (

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