Senior UVM Verification Engineer
6 days ago
Triple Crown is a leading provider of hardware, embedded, software, and mechanical engineering talent. Businesses and technology teams, from Fortune 500 enterprises to emerging startups, rely on our ability to rapidly place the developers, architects, coders, and designers who engineer digital transformation and growth.
Job Type:
Contract
Duration:
8+ Months
Location:
Remote
Requirement:
5+ years of relevant experience
We're looking for a
Senior UVM Verification Engineer
to join our team supporting ASIC development projects in the semiconductor industry. The ideal candidate will have strong verification expertise using
SystemVerilog (SV)
and
UVM
, along with solid problem-solving and communication skills. You'll play a key role in ensuring the quality and reliability of complex ASIC chips by developing, executing, and maintaining verification environments.
- Develop and execute
UVM-based verification environments
for ASIC chip designs - Create and maintain
testbench infrastructure
, including
VIP integration
and
environment bring-up - Collaborate closely with design and architecture teams to understand specifications and verification requirements
- Debug, analyze, and resolve design and verification issues efficiently
- Contribute to verification strategy, planning, and documentation
- Support regression and coverage closure efforts to meet project goals
Skills:
- SystemVerilog
- UVM Methodology
- Design Verification (DV)
- Debugging
Benefits:
- Paid weekly
- Health, Dental and Vision Insurance
- 401k
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