Senior Director, Design Verification

2 weeks ago

Austin, Texas, United States Intel Corporation Full time $247,810 - $349,850
Job Details:Job Description: 

About the Group:

Client Engineering Group (CEG) oversees all test chip design, all foundational and hard IP, all EDA and design platform functions for Intel Products, as well as all external IP and EDA commercial licensing. As part of this new charter, CEG will also create a new business focused on providing custom ASIC design services for external customers.

About the Role:

Intel's Client Engineering Group is seeking a technically strong and visionary lead for SERDES. This role will be responsible for driving the development and integration of high-speed I/O IP, including PCIe, Ethernet, and custom SERDES solutions, across advanced process nodes. The ideal candidate will have deep expertise in mixed-signal design, a proven track record of leading engineering teams, and the ability to collaborate across cross-functional groups to deliver best-in-class IP.

Key Responsibilities:

Technical Leadership

  • Lead the architecture, design, and validation of SERDES IP blocks across multiple generations of Intel process technologies.

  • Guide the team through all phases of development: specification, design, verification, silicon bring-up, and productization.

  • Ensure compliance with industry standards (e.g., IEEE 802.3, OIF CEI) and internal quality metrics.

Team Management

  • Build and mentor a high-performing team of analog/mixed-signal engineers.

  • Foster a culture of innovation, accountability, and continuous improvement.

  • Build and lead a global team.

Cross-Functional Collaboration

  • Work closely with SoC design, packaging, validation, and manufacturing teams to ensure seamless integration of SERDES IP.

  • Partner with customer engineering and product teams to translate customer requirements into technical deliverables

Program Execution

  • Own project schedules, deliverables, and risk mitigation plans.

  • Drive execution excellence and ensure timely delivery of IP to internal and external customers.

Required Experience:

  • Proven leadership experience managing technical teams.

  • Excellent communication and stakeholder management skills.

  • Familiarity with a variety of EDA tools

  • Strong understanding of semiconductor device physics and process technologies.

Preferred Skills

  • Experience with advanced packaging and signal/power integrity.

Qualifications:

  • MS or PhD in Electrical Engineering or related field.

  • 10+ years of experience in analog/mixed-signal IC design, with a focus on SERDES.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Texas, AustinAdditional Locations:Business group:Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:$247, ,850.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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