RTL Engineer Lead

Job description:

Are you interested in working with the world's leading AI-powered Quality Engineering company? Ready to advance your career, team up with global thought leaders across industries, and make a difference every day? Join us at Qualitest

Role Overview:

We are looking for a highly skilled 
RTL Design Engineer in Sunnyvale, CA
 to join our hardware development team. In this role, you will be responsible for defining, implementing, and optimizing digital logic designs at the Register Transfer Level (RTL) for complex ASIC/SoC systems.

You will work closely with architecture, verification, physical design, and validation teams to deliver high-performance, power-efficient, and functionally robust designs.

Responsibilities:

• Translate architectural specifications into efficient and synthesizable RTL designs (SystemVerilog).
• Develop detailed microarchitecture specifications for functional blocks or subsystems.
• Integrate IP blocks and ensure seamless connectivity and data flow across the SoC.
• Run design checks (lint, CDC, synthesis readiness) and support backend implementation.
• Collaborate with verification teams to define test plans, review coverage, and debug design issues.
• Support validation and bring-up teams during silicon bring-up and debug phases.
• Optimize designs for power, area, and timing while maintaining functional integrity.

Requirements:

• B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, or related field.
• 3+ years of experience in digital logic or RTL design for ASIC/SoC projects.
• Strong proficiency in SystemVerilog.
• Solid understanding of digital design fundamentals (FSMs, pipelining, arbitration, clock/reset domain handling, etc.).
• Experience with EDA tools for simulation, synthesis, and linting (e.g. Synopsys, Cadence, Mentor).
• Familiarity with low-power design techniques, timing analysis, and interface protocols (e.g., AXI, AMBA, PCIe, DDR).
• Excellent problem-solving skills, attention to detail, and ability to work in a cross-functional environment.

Preferred Qualifications:

• Experience with SoC-level integration and debug.
• Knowledge of scripting languages (Python, Perl, or Tcl) for automation.
• Exposure to FPGA prototyping or emulation environments.
• Understanding of hardware/software interaction and system-level architecture.

**Benefits

Why QualiTest?**

• Local and global opportunities – we offer you internal rotation and international mobility opportunities to grow your career.
• Work hard and play harder with our flexible and casual culture. Take a break from work and join an employee event, or enjoy the amenities and games provided from one of our Employees Centers.Save your earnings and prepare for your future by enrolling in our 401k plan where Qualitest will match your contributions accelerating your savings plan.
• Take care of health with enrollment into one of our competitive healthcare benefits. Qualitest will match towards your HSA if you choose to participate.
• Never stop experimenting and learning with QCraft – our Learning & Development platform: 50,000+ courses, 300+ virtual labs, mentorship and leadership programs, professional tribes, sponsored certifications, and much more.
• Earn bonuses via our Client Referral and Employee Referral Program's. Refer and earn – tap your network for net-worth.
• We recognize our employees work via our Qudos platform - You can earn bonuses and spot awards by celebrating your and your peers' achievements.
• A Competitive pay, the salary range for the role is $140,000 - $160,000.

Intrigued to find more about us?

• Visit our website at 
  
• If you like what you have read, send us your resume and let's start talking

Profile description:

Are you interested in working with the world's leading AI-powered Quality Engineering company? Ready to advance your career, team up with global thought leaders across industries, and make a difference every day? Join us at Qualitest

Role Overview:

We are looking for a highly skilled 
RTL Design Engineer in Sunnyvale, CA
 to join our hardware development team. In this role, you will be responsible for defining, implementing, and optimizing digital logic designs at the Register Transfer Level (RTL) for complex ASIC/SoC systems.

You will work closely with architecture, verification, physical design, and validation teams to deliver high-performance, power-efficient, and functionally robust designs.

Responsibilities:

• Translate architectural specifications into efficient and synthesizable RTL designs (SystemVerilog).
• Develop detailed microarchitecture specifications for functional blocks or subsystems.
• Integrate IP blocks and ensure seamless connectivity and data flow across the SoC.
• Run design checks (lint, CDC, synthesis readiness) and support backend implementation.
• Collaborate with verification teams to define test plans, review coverage, and debug design issues.
• Support validation and bring-up teams during silicon bring-up and debug phases.
• Optimize designs for power, area, and timing while maintaining functional integrity.

Requirements:

• B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, or related field.
• 3+ years of experience in digital logic or RTL design for ASIC/SoC projects.
• Strong proficiency in SystemVerilog.
• Solid understanding of digital design fundamentals (FSMs, pipelining, arbitration, clock/reset domain handling, etc.).
• Experience with EDA tools for simulation, synthesis, and linting (e.g. Synopsys, Cadence, Mentor).
• Familiarity with low-power design techniques, timing analysis, and interface protocols (e.g., AXI, AMBA, PCIe, DDR).
• Excellent problem-solving skills, attention to detail, and ability to work in a cross-functional environment.

Preferred Qualifications:

• Experience with SoC-level integration and debug.
• Knowledge of scripting languages (Python, Perl, or Tcl) for automation.
• Exposure to FPGA prototyping or emulation environments.
• Understanding of hardware/software interaction and system-level architecture.

**Benefits

Why QualiTest?**

• Work hard and play harder with our flexible and casual culture. Take a break from work and join an employee event, or enjoy the amenities and games provided from one of our Employees Centers.Save your earnings and prepare for your future by enrolling in our 401k plan where Qualitest will match your contributions accelerating your savings plan.
• Take care of health with enrollment into one of our competitive healthcare benefits. Qualitest will match towards your HSA if you choose to participate.
• Never stop experimenting and learning with QCraft – our Learning & Development platform.
• Earn bonuses via our Client Referral and Employee Referral Program's.
• The salary range for the role is $140,000 - $160,000.

Intrigued to find more about us?

• Visit our website at 
  
• If you like what you have read, send us your resume and let's start talking

We offer:

Are you interested in working with the world's leading AI-powered Quality Engineering company? Ready to advance your career, team up with global thought leaders across industries, and make a difference every day? Join us at Qualitest

We're seeking a
RTL Engineer
 to join our growing team in the United States.

Role
: RTL Engineer Lead

Location
: Sunnyvale, CA (onsite)

About the Role

Role Overview:

We are looking for a highly skilled 
RTL Design Engineer
 to join our hardware development team. In this role, you will be responsible for defining, implementing, and optimizing digital logic designs at the Register Transfer Level (RTL) for complex ASIC/SoC systems.

You will work closely with architecture, verification, physical design, and validation teams to deliver high-performance, power-efficient, and functionally robust designs.

Responsibilities:

• Translate architectural specifications into efficient and synthesizable RTL designs (SystemVerilog).
• Develop detailed microarchitecture specifications for functional blocks or subsystems.
• Integrate IP blocks and ensure seamless connectivity and data flow across the SoC.
• Run design checks (lint, CDC, synthesis readiness) and support backend implementation.
• Collaborate with verification teams to define test plans, review coverage, and debug design issues.
• Support validation and bring-up teams during silicon bring-up and debug phases.
• Optimize designs for power, area, and timing while maintaining functional integrity.

Requirements:

• B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, or related field.
• 3+ years of experience in digital logic or RTL design for ASIC/SoC projects.
• Strong proficiency in SystemVerilog.
• Solid understanding of digital design fundamentals (FSMs, pipelining, arbitration, clock/reset domain handling, etc.).
• Experience with EDA tools for simulation, synthesis, and linting (e.g. Synopsys, Cadence, Mentor).
• Familiarity with low-power design techniques, timing analysis, and interface protocols (e.g., AXI, AMBA, PCIe, DDR).
• Excellent problem-solving skills, attention to detail, and ability to work in a cross-functional environment.

Preferred Qualifications:

• Experience with SoC-level integration and debug.
• Knowledge of scripting languages (Python, Perl, or Tcl) for automation.
• Exposure to FPGA prototyping or emulation environments.
• Understanding of hardware/software interaction and system-level architecture.

**Benefits

Why QualiTest?**

• Be a part of a company who strives to support for diversity and inclusion in the workplace – we are one, we are many at Qualitest. Celebrate culture, share knowledge with engineers from around the globe, and inspire each other through our differences. We have more than 40% women and around 120 different nationalities.
• Local and global opportunities – we offer you internal rotation and international mobility opportunities to grow your career.
• Clear view of your career and progression with the company – Qualitest is growing massively (since 2021 – tripled our employees base – we now have more than 8,000 engineers) and giving you the opportunity to grow with us.
• Work hard and play harder with our flexible and casual culture. Take a break from work and join an employee event, or enjoy the amenities and games provided from one of our Employees Centers.Save your earnings and prepare for your future by enrolling in our 401k plan where Qualitest will match your contributions accelerating your savings plan.
• Take care of health with enrollment into one of our competitive healthcare benefits. Qualitest will match towards your HSA if you choose to participate.
• Never stop experimenting and learning with QCraft – our Learning & Development platform: 50,000+ courses, 300+ virtual labs, mentorship and leadership programs, professional tribes, sponsored certifications, and much more.
• Stay active and get rewarded with our Corporate Wellness Program. We pay your Gym membership and giving you opportunities to Earn additional vacation times for attendance the gym
• Earn bonuses via our Client Referral and Employee Referral Program's. Refer and earn – tap your network for net-worth.
• We recognize our employees work via our Qudos platform - You can earn bonuses and spot awards by celebrating your and your peers' achievements.
• Planning a vacation? Looking for car insurance? Get access to Qualitest Employee Perks for discounts on anything from travel to electronics. With so many offerings the savings are endless
• A Competitive pay, the salary range for the role is $140,000 - $160,000.

Intrigued to find more about us?

• Visit our website at 
  
• If you like what you have read, send us your resume and let's start talking