Senior ASIC Engineer

Summary:

Meta is seeking a highly skilled Senior ASIC Formal Verification Engineer to join our dynamic Infrastructure team. This role is essential for those looking to leverage their expertise in Formal Verification to design cutting-edge IP and System On Chip (SoC) solutions for our innovative data center applications. As part of a collaborative team, you'll play a critical role in shaping ASIC solutions that drive Meta's technological advancement.

In this position, you will create comprehensive formal test plans and ensure the formal verification sign-off for complex blocks. You will work closely with full stack software, hardware engineers, ASIC design teams, emulation specialists, and post-silicon teams to achieve success in creating first-pass silicon.

Key Responsibilities:

1. Lead and provide technical expertise in Formal Verification initiatives.
2. Develop and advocate for a state-of-the-art Formal Verification Methodology for the organization at various levels.
3. Collaborate with Architecture and Design teams to formulate precise specifications and implementations.
4. Establish formal verification scope and create environments using advanced Formal Verification Techniques at the IP, Subsystem, and SoC levels.
5. Build versatile and scalable environments for Formal Verification and effectively deploy the required tools.
6. Assess and recommend Electronic Design Automation (EDA) solutions to enhance Formal Verification processes.
7. Mentor and train internal teams on Formal Verification technology.

Minimum Qualifications:

1. Bachelor's degree in Computer Science, Computer Engineering, or a related technical field.
2. Over 8 years of experience in Design Verification.
3. 5+ years of hands-on experience in Formal Verification.
4. Proficient in Formal Verification applications including Datapath, sequential equivalence, Xprop, Clock Gating, and connectivity.
5. Strong understanding of methodologies, complexity reduction, and abstraction techniques in Formal Verification.
6. Excellent analytical skills for devising innovative solutions for complex industry designs.
7. Effective collaboration abilities with cross-functional teams.
8. Proficient in hardware description languages like SystemVerilog and SVA.
9. Skilled in scripting languages such as Python, Perl, or Tcl.
10. Familiarity with JasperGold or VC-Formal tools.

Preferred Qualifications:

1. Ability to rapidly comprehend and analyze specifications to identify design behaviors and properties.
2. Experience in formal property verification of complex compute blocks, such as DSP, CPU, GPU, or hardware accelerators.
3. Familiarity with complex SoC architectures.
4. Knowledge of formal verification in clock domain crossing and low power design scenarios.
5. Experience in developing fully automated flows from specifications to verified designs.
6. Competence with simulators and waveform debugging tools.

Public Compensation:

$173,000/year to $249,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We embrace diversity and do not discriminate based on race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, age, status as a protected veteran, disability status, or any other legally protected characteristics. We also consider applicants with criminal histories consistent with applicable laws. Please note that Meta may use artificial intelligence and machine learning technologies in the recruitment process.

Meta is dedicated to providing reasonable accommodations for candidates with disabilities throughout our recruitment process. If you require assistance or accommodations, please reach out to us.