Hardware Design Engineer

2 weeks ago


Redmond, WA, United States Talent Software Services Full time
Hardware Design Engineer 5

Job Summary: Talent Software Services is in search of a Hardware Design Engineer for a contract position in Redmond, WA. The opportunity will be for three months with a strong chance for a long-term extension.

Position Summary: Become an integral part of a team focused on design verification for complex IPs and subsystems within modern FPGAs. You will be responsible for developing and executing verification test plans for IPs and/or subsystems. Become part of a team focused on design verification for complex IPs and subsystems in modern FPGAs. Develop and execute verification test plans for IPs and/or subsystems. This includes the development of testbench infrastructure, testcase creation, implementing checkers, writing functional coverage and assertions, developing common/reusable verification components for reuse across teams, performing coverage analysis and closure, running simulations and regressions, and triaging and debugging test failures. Join a dynamic team dedicated to advancing the storage and networking sectors. You'll be part of a project aimed at developing an FPGA to accelerate storage and networking flow. This role is instrumental in contributing to the cloud infrastructure. This includes:
  • Development of testbench infrastructure.
  • Testcase creation.
  • Implementing checkers.
  • Writing functional coverage and assertions.
  • Developing common/reusable verification components for reuse across teams.
  • Performing coverage analysis and closure.
  • Running simulations and regressions.
  • Triage and debug test failures.
The ideal candidate has extensive experience in IP-level verification using UVM and SystemVerilog within the last 3 years. Knowledge of the AMBA AXI protocol is preferred but not required.

Primary Responsibilities/Accountabilities:
  • Analyze information for project planning and execution.
  • Create and modify existing environments and components to verify features in a UVM simulation environment.
  • Build, test, and modify product prototypes using working or theoretical models constructed with computer simulation.
  • Evaluate factors such as reporting formats, constraints, and security needs to determine hardware configuration.
  • Monitor equipment functionality and make necessary modifications to ensure the system operates according to specifications.
  • Performance will be measured by on-time execution based on the schedule, with high-quality work, as indicated by the number of bugs found.
Qualifications:
  • Minimum of 10 years of experience in the field.
  • A bachelor's degree in Engineering is required.
  • Creativity, verbal and written communication skills, analytical and problem-solving ability.
  • Team player and detail-oriented.
  • Basic knowledge of Verilog RTL programming language.
  • Advanced knowledge of UVM and SystemVerilog programming languages.
  • Basic understanding of the practical application of engineering science and technology.
  • Basic knowledge of ASIC or FPGA-based verification.
  • Previous experience with design related to the hardware engineering field.
  • Extensive knowledge of UVM.
  • Proficient in coding with SystemVerilog.
  • Knowledge of Verilog programming language.
  • The ideal candidate has extensive experience in IP and SoC level verification using UVM and SystemVerilog within the last 3 years.


If this job is a match for your background, we would be honoured to receive your application

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