Senior Design Verification Flow
4 days ago
Eastridge Workforce Solutions is committed to connecting skilled professionals with meaningful career opportunities. We are seeking a Senior Design Verification Flow / Tools Engineer to support our client's team.
Job Title: Senior Design Verification Flow / Tools Engineer
Location: Austin, TX
Pay Range: $108 - $140/hr
Employment Type: Temp to Hire
We are seeking Senior Design Verification Flow / Tools Engineers to join a front-end tools and flows team supporting large-scale GPU and System IP (SoC) design organizations. This team enables over 400+ RTL and Design Verification engineers globally by owning and maintaining critical verification infrastructure used across the company.
This is a hands-on, senior-level role focused on verification flows, automation, and performance. It is not a learning or ramp-up role-candidates must be able to take ownership immediately and work independently.
This is strictly a front-end verification role.
Backend / physical design experience (place & route) is not applicable.
What This Team Owns
- End-to-end simulation and regression infrastructure (SIMFlow)
- Large-scale regression frameworks (Perl-based)
- Jenkins-driven CI, daily, and weekly regression workflows
- Coverage collection, merging, and maintenance
- Verification tool versioning strategy and ownership
- Collaboration with EDA vendors on tool issues and bugs
- Internal scripts, tools, and widgets used broadly by RTL and DV teams
- Own and enhance verification flows used by GPU and SoC teams
- Improve automation, performance, scalability, and reliability
- Maintain and debug large regression systems
- Own coverage flows, including merging and maintenance
- Identify and resolve simulation, performance, and tool issues
- Partner closely with RTL and DV engineers to unblock development
- Work onsite with the team in Austin to collaborate in real time
- 10+ years of Design Verification experience
- Strong front-end verification background
- Deep hands-on experience with:
- RTL, SystemVerilog, and UVM
- Building, maintaining, and debugging DV testbenches
- Simulation expertise:
- Synopsys VCS (required)
- Cadence Xcelium / IES (strongly preferred)
- Scripting:
- Perl (critical - core of SIMFlow)
- Python
- Linux shell scripting (terminal-heavy environment)
- Verification flows:
- Regression setup, execution, and maintenance
- Debugging failures and performance issues
- Coverage flow ownership
- X-propagation experience
- Version control:
- Git and Perforce
- Ability to trace commits, debug regressions, and identify breaking changes
- Ability to work independently with minimal guidance
- Exposure to ML / AI-based verification or automation workflows
- No training provided, but prior exposure or interest is a plus
Benefits: Use this link bit.ly/4cGUQSh to learn more about benefits available to Eastridge's temporary employees. From time to time Eastridge's clients may offer additional benefits to Eastridge employees while on assignment. Information about those benefits will be communicated when applicable.
Eastridge Workforce Solutions is an equal opportunity employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws. We celebrate diversity and are committed to creating an inclusive environment for all employees. Please note that Eastridge is unable to provide visa sponsorship to applicants.
Certain clients require Eastridge to perform background checks and Eastridge will consider qualified applicants with criminal histories in a manner consistent with any applicable federal, state, or local law regarding criminal backgrounds, including but not limited to the Los Angeles Fair Chance Initiative for Hiring and the San Francisco Fair Chance Ordinance.
#IPRO #IPROPLUS
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