Principal Digital IC Design Engineer

Overview SRI's Center for Advanced Imaging Electrical Engineering Team based in Princeton, NJ, is seeking innovative and highly motivated Principal Digital IC Design Engineer - Verilog RTL  to join us in the development of state-of-the-art IC and FPGA designs for numerous commercial, spacecraft, and government applications. The ideal candidate would join a multidisciplinary group dedicated to the development of complex electronics for applications such as low light imaging cameras, space base imaging cameras, LiDAR cameras, including ROIC and Imagers for those applications. Ideally the candidate will be in driving distance to the Princeton NJ office and able to go on-site about once a week. Responsibilities Digital logic design using RTL (Verilog preferred or VHDL), verification and documentation of detailed design solutions that involve SOC and ROIC implemetations. This includes high speed digital designs that interface to DDR memory systems as well as high speed digital interfaces (1GHz+) and high speed SERDES interfaces (> 1.5 GHz) as well as complex FSM and control logic for these applications. Design high-speed data paths to implement arithmetic functions and signal processing algorithms as needed, as well as complex control state machines.  Collaboration with Analog IC designers, HW PCB designers, Software developers, and Mechanical team members to produce high quality designs. Design and development of test benches and quality/test requirements for each design. Accurately and concisely present design and simulation results to clients, colleagues, designers, and managers. Qualifications B.S. in Electrical Engineering/Computer Engineering or a related field, M.S. degree preferred 15 to 30 years of related experience Due to government contract requirements candidates must be a US Citizen Strong understanding of digital logic design and verification. RTL coding languages required (Verilog) and simulation expertise using common tools Knowledge of logic synthesis and timing analysis Knowledge of computer arithmetic, digital signal processing and related VLSI architectures. Knowledge of Microsoft Office products including Visio Desired qualifications: Video and imaging application experience, including camera or imager design for visible and LiDAR type cameras/applications. RTL coding languages – System Verilog, VHDL Experience with simulation tools like Mentor Modelsim or Questa, Cadence Xcelium, Xilinx Vivado, etc Understanding of physical implementation, including logic synthesis and/or place and route and experience with Cadence Genus and Tempus or similar Experience with CM tools like Omnify (PLM) and SVN (Rev Control) Matlab, Python, Perl or other SW language knowledge for scripting and test bench automation Experience with embedded ARM cores  Knowledge of design for low power and power conditioning circuits Experience with Radiation hardened circuit design Familiarity with data compression techniques desirable for helping to manage large amounts of data produced by our high-end camera systems Experience with AI implementations and algorithms Familiar with common test equipment such as oscilloscopes, function generators, VOM, logic analyzers, parametric analyzers, etc Modest travel, less than 5% The salary range is: $162,648.00-$180,000.00. Salary ranges will vary and are based on several factors, including geographic location, market competitiveness and equity amongst internal employees in similar roles. Positions may also qualify for SRI's Pay for Outstanding Performance program or the annual Performance Based Compensation program. SRI also has a competitive benefits package