Failure Analysis Engineer

1 week ago

San Jose, United States Adecco Full time
Job DescriptionJob Description

Failure Analysis Engineer (85K-100k)

Adecco has partnered with an International Electronics Manufacture to hire 5 Full Time/ Direct Hire Failure Analysis Engineer in San Jose, CA or Milwaukee, WI.

***This company is in Artificial Intelligence (AI) It works with Nvidia and the urgency for the travel trip is for Artificial Intelligence (AI) race. Seeking young engineers who want to grow their careers in Artificial Intelligence (AI) because they are offering international opportunity to work with cross functional team in Artificial Intelligence (AI). Nvidia is competing with TSMC as the main AI chip manufacture.

ALL EXPENSE PAID Travel Project and then will be stationed in the local plant afterwards. (Either San Jose, CA or Milwaukee, WI )

**Training 2-3 weeks onsite in San Jose, CA or Milwaukee, WI and then travel on an as needed basis to Mexico plant. 5 days training in Taiwan. Must have US passport and open to travel.

**US sponsorship offered for Mandarin speaking candidates

  • Daily Food Stipend for Meals

  • Staying at Hotels in Mexico & Milwaukee

  • Company offer year end bonus

  • Extra pay if working weekends

  • Full Healthcare, Dental, Vision, Retirement Benefits, PTO

  • Must be passport ready to travel

JOB SUMMARY

Member of senior engineering team responsible for Product Problem resolution of Industry Standard Servers. Interfaces with customer and The Company R&D, Product Engineering & Quality Engineering organizations to identify elevated factory & field failure symptom’s requiring in depth circuit failure analysis which ultimately leads to identification of root cause, corrective action recommendations of ESSN Server Products portfolio.

.

II. ESSENTIAL FUNCTIONS

  • Perform engineering investigations of significant customer field and line escalations related to hardware issues.

  • Improve customer satisfaction and product quality through timely resolution of hardware related issues.

  • Interface directly with design and manufacturing teams to determine root-cause of hardware issues to the component level.

  • Collaborate with numerous internal engineering disciplines (HW, SW, Mechanical, Materials, Reliability...) to resolve hardware issues.

  • Facilitate the execution of special capture programs (ARDAP/Early Field Capture & Selective Field Capture)

  • Provide feedback to internal and external process and design teams based on analytical findings.

  • Support the internal communications of techniques and processes that can be deployed into WW RMA & Service Centers to improve on product knowledge and drive efficiencies into Site PCA debug.

  • Drive “best practices” across WW Operational, RMA & Service Sites.

* Performs a variety of marginal duties not listed, to be determined and assigned as needed.

III. MINIMUM QUALIFICATIONS

A. Education, Experience, and Training

  • Bachelor's degree in Electrical/Electronic Engineering or a related field is required, along with 3-5 years of experience in the field.

  • Demonstrated ability to debug complex HW issues using logic analyzers, oscilloscopes, and other test equipment.

  • Have experience with electrical and electronic design tools such as CAD, schematic capture tools, and PCB layout software. Additionally, knowledge of various testing methodologies, including functional testing, boundary scan testing, and in-circuit testing is necessary.

  • Working knowledge of key server technologies including Intel and AMD multi-core microprocessors, DDR 3/4 and NAND memory, and PCA design. (Knowledge of PCI-e protocols, SAS, SCSI, SATA, FibreChannel, Ethernet, WiFi and Bluetooth, NVME, SSD technologies)

  • Must be a self-motivated team player with the ability to work in a customer oriented, fast-paced, demanding, and often challenging environment with minimal supervision.

  • Knowledgeable in full hardware/software development life cycle.

  • Experience in hardware/firmware/software development and test methodologies.

  • Experience working with internal and external partners

  • Excellent analytical and problem solving skills

  • Willingness to travel abroad to support development of international employees for extended periods of time.

B. Knowledge and Skills

  • Fluency in programming languages such as C#, JavaScript, Python, SQL etc.

  • Familiar with Computer OS such as Windows, CentOS, Ubuntu, Linux or Tiny Linux etc.

  • Experience in troubleshooting analog and digital circuits. Troubleshoots, debugs, and determines root cause at PCBA and system levels for customer devices.

  • Highly proficient in reading and interpreting assembly drawings, schematics, and board layout. Analyzes circuits and layout to identify marginal failure root causes.

  • Familiar with the use of a variety of testing and measuring devices such as Functional generator, DMM, oscilloscopes, and Adjustable power supplies.

  • Familiar with RMA process. Fluency with data collection and analysis.

  • Develops, maintains, and improves all troubleshooting solutions within area or responsibility.

  • Demonstrated problem solving and organizational skills. Works with various engineering groups to make sure the RMA products asap return back to customer as requested.

  • Knowledge of PCA, System, RMA & Service manufacturing environments.

  • Skill in isolating and safely injecting failures to segregate problems during debug from the Server layer into specific PCAs.

  • Working knowledge of Linux commands and structures, preferably with at least exposure to IPMITools

  • Ability to create, develop and debug algorithms and test tools to aid in isolation of failures, along with strong documentation skills needed to share with others on the team.



Pay Details: 85,000.00 to 100,000.00 per year

Equal Opportunity Employer/Veterans/Disabled

To read our Candidate Privacy Information Statement, which explains how we will use your information, please navigate to https://www.adecco.com/en-us/candidate-privacy

The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:
  • The California Fair Chance Act
  • Los Angeles City Fair Chance Ordinance
  • Los Angeles County Fair Chance Ordinance for Employers
  • San Francisco Fair Chance Ordinance

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