Analog Design Engineer

4 days ago

Hillsboro, United States Synopsys Full time
Job Title: Analog Design, Principal Engineer

We are seeking a highly skilled Analog Design, Principal Engineer to join our team at Synopsys. As a key member of our analog and mixed signal R&D team, you will be responsible for designing, developing, and refining high-speed analog integrated circuits in the latest FinFET and gate all around process nodes.

Key Responsibilities:
  • Develop novel transceiver architectures and sub-block specifications based on SerDes standards.
  • Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets.
  • Work across project and department teams to streamline design and verification strategies, ensuring overall design quality, efficiency, and performance.
  • Oversee physical layout to minimize the effect of parasitics, device stress, and process variation.
  • Present and review simulation data from internal project teams.
  • Present results externally at industry panels or at customer reviews.
  • Document design features and test plans.
  • Consult on the overall electrical characterization of the SerDes IP product.
  • Analyze customer silicon data for design enhancements.
  • Propose solutions for post-silicon design updates.
Requirements:
  • PhD with 10+ years, or MSc with 12+ years of practical analog IC design experience; degree in Electrical Engineering or Computer Engineering or other relevant field of study.
  • Experience with FinFET technologies.
  • Extensive design experience with sub-circuits relevant to SerDes, including equalizers, DAC-based transmitters, ADC-based receivers, high-speed clocking circuits, and digitally assisted analog calibration loops.
  • In-depth familiarity with transistor-level circuit design, sound CMOS design fundamentals, and experience with CMOS tape-outs.
  • Knowledge of SerDes, circuit, and fabrication issues that directly impact customer use-cases.
  • Aware of ESD issues, including circuit techniques and layout.
  • Familiarity with custom digital design, including high-speed logic paths, serializers, and deserializers.
  • Experience with analog/digital interactions for optimizing circuit performance, including calibration, adaptation, timing-handoff, and design for reliability.
  • Knowledge of design for reliability, including EM, IR, aging, self-heating, and layout effects.
  • Experience with tools for schematic entry, physical layout, and design verification.
  • Knowledge of SPICE simulators and simulation methods.
  • Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.
  • Experience with TCL, Perl, C, Python, MATLAB, or other scripting languages is desired.
  • Excellent communication, presentation, and documentation skills.
About Synopsys:

Synopsys is a leading provider of silicon IP and design tools. Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

The base salary range for this role is between $154,000-$230,000 annually. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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