Physical Design Sr Manager
2 weeks ago
About the Role:
We are seeking an experienced Physical Design Sr Manager to lead our Physical Design team and Design for Test (DFT) team in the development of state-of-the-art integrated circuits.
The ideal candidate will have a deep understanding of physical design methodologies, excellent leadership skills, and a proven track record of successfully managing complex projects from conception to tape-out.
Key Responsibilities:
- Manage and mentor a team of physical design engineers, fostering a collaborative and innovative work environment.
- Define team goals, assign tasks, and ensure project milestones are met on time and within budget.
- Provide technical guidance and support to the team, addressing any challenges or roadblocks.
- Oversee the entire physical design process, including physical synthesis, floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off verification.
- Ensure designs meet all performance, power, and area (PPA) targets as well as timing, signal integrity, and manufacturing constraints.
- Collaborate with RTL designers, verification teams, and other engineering disciplines to optimize designs and resolve issues.
- Integrate DFT strategies into the physical design flow to enhance testability and fault coverage.
- Ensure that DFT features such as scan insertion, Built-in Self-Test, and boundary scan are implemented and verified.
- Collaborate with test engineering teams to ensure that DFT methodologies align with overall test strategies and manufacturing requirements.
- Develop and manage project schedules, resource allocation, and risk mitigation strategies.
- Track project progress, identify potential issues, and implement corrective actions to ensure timely project delivery.
- Communicate project status, challenges, and successes to senior management and stakeholders.
Requirements:
- 10+ years of experience in physical design with at least 3 years in a leadership or management position.
- Proven track record of leading physical design teams through successful tape-outs.
- Experience with advanced technology nodes (e.g., 3nm or below) is highly required.
- Experience with low-power design techniques and methodologies.
- Deep knowledge of physical design tools (e.g., Cadence, Synopsys, Siemens) and methodologies.
- Strong understanding of the entire physical design process.
- Strong knowledge of DFT methodologies including scan insertion, BIST, boundary scan, and ATPG (Automatic test pattern generation).
- Familiar with post-silicon validation and tape-out process.
- Experience managing multi-site projects and working with global teams.
What We Offer:
Juniper Networks offers a competitive salary range of $179,200.00 to $257,600.00 per year, as well as a comprehensive benefits package, including medical benefits, 401(k) eligibility, vacation, sick time, and parental leave.
We are an equal opportunity employer and welcome applications from diverse candidates. If you are passionate about physical design and leadership, we encourage you to apply for this exciting opportunity.
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