Senior RFIC-PLL Designer
1 week ago
We are seeking a highly skilled Senior RFIC-PLL Designer to join our Wireless Radio team at Apple. As a key member of our team, you will be responsible for designing and developing analog and digital PLL solutions for wireless SoC and driving them to mass production.
Key Responsibilities- Lead the design of radio transceiver chains, including analog PLLs, VCOs, digital PLLs, DCOs, LOGen, and chain of blocks in RX and TX for wireless connectivity products.
- Drive radio KPIs (power, area, performance) to meet product requirements.
- Collaborate with cross-functional teams, including platform architecture, wireless design, RF HW and SW, to define radio features enabling wireless innovation.
- Design RF and Analog loopbacks for calibration and compensation.
- Work through Co-Existence scenarios and design to meet CoEx requirements.
- Oversee floorplan layout and verification of the design to ensure a successful tape-out.
- Collaborate with RFIC test engineers in the bring up, debug, and optimization of the wireless connectivity chip through productization.
- Provide design versus silicon measurements correlation and compliance with specification for volume production.
- Typically requires 3+ years of RF/analog and mixed-signal design experience in cutting-edge RF CMOS design.
- Direct experience in designing and bringing into mass production of wireless transceivers in deep sub-micron RFCMOS technology.
- Experienced in design and development of fractional N Synthesizers, Digital PLLs, Analog PLLs, LO-Gen for high-performance applications and low-power applications.
- Hands-on experience in designing TDC, GRO, Digital Filters, Sigma Delta Modulators, Pre-scalers, and MMD, DCOs, PFD-CP, and VCOs.
- Deep understanding of analog, mixed-signal, and RF circuit design, including LNAs, PAs, mixers, baseband filters, VGAs, and calibration methods associated with high-performance wireless systems.
- Familiarity with various RF transceiver architectures and their trade-offs, system specifications, and ability to work with system architects to translate system requirements into circuit requirements at IC level.
- Experienced in Cadence Virtuoso, Spectre RF, Matlab, EM simulation (EMX, HFSS), and similar tools.
- Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime).
- Demonstrated capability to work with digital design group for an optimum partition between digital and analog domain, timing requirements.
- Extensive experience in fractional N synthesizer and LOGen silicon characterization and debug.
BS and 3+ years of relevant industry experience. MSEE and PhD is preferred.
Additional RequirementsApple is an equal opportunity employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities.
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