Senior ASIC Integration Engineer
4 weeks ago
Job Summary
This role is for a highly skilled ASIC Integration Engineer to join our dynamic team at Apple. As a key member of our Hardware Engineering group, you will be responsible for designing and integrating complex System-on-Silicon (SoC) chips for high-end mobile applications.
Key Responsibilities
- Full chip and block level timing closure ownership throughout the entire project cycle (RTL, synthesis, and physical implementation)
- Develop and maintain methodology and flows related to timing verification and closure
- Generation of block and full chip timing constraints
- Work on Apple SoC chips in deep sub-micron technologies
- Collaborate with various multi-functional teams to resolve complex timing issues for major building blocks of complex SoCs
Requirements
- Deep knowledge of the ASIC design timing closure flow and methodology
- Deep experience in ASIC timing constraints generation and timing closure
- Expertise in STA tools (Primetime) and flow
- Good knowledge of timing corners/modes, process variations, and signal integrity related issues
- Hands-on experience in timing/SDC constraints generation and management
- Proficient in scripting languages (TCL and Perl)
- Familiarity with synthesis, logic equivalence, DFT, and backend-related methodology and tools
- Strong background in constraint analysis and debug, using industry-standard tools such as Synopsys GCA (Galaxy Constraint Analyzer)
Preferred Qualifications
- Bachelor's Degree + 10 years of experience
What We Offer
- Comprehensive medical and dental coverage
- Retirement benefits
- Range of discounted products and free services
- Reimbursement for certain educational expenses
- Discretionary bonuses or commission payments
Apple is an Equal Opportunity Employer
We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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