Senior RTL Design Engineer
1 month ago
We are seeking a highly skilled RTL Design Engineer to join our team at Yoh, a Day & Zimmermann company. As a key member of our engineering team, you will be responsible for designing and developing high-performance RTL designs for our clients.
Job Summary:The ideal candidate will have a strong background in RTL design, with a focus on RISC-V architecture. You will work closely with our clients to understand their design requirements and develop innovative solutions to meet their needs.
Responsibilities:- Design and develop high-performance RTL designs for RISC-V architecture
- Collaborate with clients to understand design requirements and develop solutions
- Develop and maintain verification flows for RTL designs
- Debug RTL/logic issues across various hierarchies (core, chip) in pre-silicon environment
- Develop RTL as well as understand verification flows
- Stay up-to-date with industry trends and emerging technologies
- 7+ years of RTL design experience
- RISC-V experience is a must-have
- Strong Verilog experience
- Experience working with high-performance OOO CPU microarchitecture
- Experience working with x86, ARM, or RISC-V based CPU
- Architectural understanding of Rename, Scheduler, Reorder Buffer, and Datapath for an Out of Order CPU
- Git/Bender experience
- Strong background and experience with high-performance OOO CPU microarchitecture
- Experience working with SOC's that are built around machine learning accelerators
We offer a competitive salary range of $80.00 to $95.00 per hour, depending on experience and qualifications. We are an equal opportunity employer and welcome applications from all qualified candidates.
Please visit our website to learn more about our company and apply for this exciting opportunity.
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