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Senior RFIC Design Engineer

2 months ago


San Diego, California, United States Apple Full time
Job Summary

We are seeking a highly experienced Senior RFIC Design Engineer to join our Wireless Silicon Development team at Apple. As a key member of our team, you will be responsible for designing and developing cutting-edge wireless connectivity solutions for our products.

Key Responsibilities
  • Lead the design of radio transceiver chains, including TX, RX, and PLL-LOGen, for wireless connectivity products.
  • Drive radio KPIs (power, area, performance) to meet product requirements.
  • Collaborate with cross-functional teams to define radio features and enable wireless innovation.
  • Work closely with RF Systems to develop block-level and high-level specifications for TX and RX lineups and PLL-LOGen.
  • Contribute to hands-on design, from concept to transistor-level feasibility studies and KPI trade-off analysis.
  • Design RF and Analog loopbacks for calibration and compensation.
  • Work through Co-Existence scenarios and design to meet CoEx requirements.
  • Oversee floorplan layout and verification to ensure successful tape-out.
  • Closely collaborate with RFIC test engineers to bring up, debug, and optimize wireless connectivity chips.
  • Provide design versus silicon measurements correlation and compliance with specifications for volume production.
  • Work with the foundry team to understand capabilities and limitations of new technology nodes.
  • Provide guidance on analog and RF issues across Apple.
Requirements
  • 10+ years of RF/analog and mixed-signal design experience in cutting-edge RF CMOS design.
  • Direct experience in designing and bringing into mass production of wireless transceivers in deep sub-micron RFCMOS technology.
  • Deep understanding of analog, mixed-signal, and RF circuit design, including LNAs and PAs, PLL/VCO/DCO/LOGEN blocks, mixers, baseband filters, and amplifiers.
  • Experience with DFT and DFM techniques for mass production environments.
  • Deep understanding of analog design concepts, such as analysis of noise, linearity, mismatch, stability, and other analog impairments.
  • Familiarity with various RF transceiver architectures and their trade-offs, system specifications, and ability to work with system architects.
  • Proven capability to work with digital design groups for optimum partition between digital and analog domains.
  • Familiarity with integration flows and challenges of wireless SoCs.
  • Strong knowledge of desense and ability to work closely with board RF/HW/Antenna teams to optimize board/module layouts.
  • Experience with Cadence Virtuoso, Spectre RF, Matlab, EM simulation, and similar tools.
  • Familiarity with mixed-signal mode verification methodology.
  • Extensive experience in Silicon characterization and debug.
  • Ability to drive strong production test/QA methodologies.
Education & Experience

BS and 10+ years of relevant industry experience. MSEE and PhD preferred.