AI/ML Co-Design Engineer for Efficient Neural Accelerators

5 days ago


Seattle, Washington, United States Apple Full time
Job Description

We are seeking a skilled AI/ML Co-Design Engineer to join our team at Apple. As a member of our Data and Machine Learning Innovation (DMLI) team, you will be responsible for co-designing hardware and software solutions that improve the efficiency of neural workloads at inference time.

Your primary focus will be on architecting energy-efficient hardware designs, implementing changes in our in-house simulator, and working with ML engineers to optimize their networks for HW acceleration. You will also be responsible for implementing features in our simulation engine and compiler for next-gen accelerators.

To be successful in this role, you will need to have a strong understanding of computer systems and the interactions between HW and SW. You should also be proficient in Python and have working knowledge of C++. Additionally, you should have experience with backend compilation, ML/HW/SW co-design, and/or performance optimization.

We value team members with strong communication skills and experience working cross-functionally with HW, SW, and ML teams. If you are a motivated and detail-oriented individual who is passionate about AI/ML and co-design, we encourage you to apply for this exciting opportunity.

Responsibilities
  • Co-design hardware and software solutions for efficient neural workloads
  • Implement features in our simulation engine and compiler for next-gen accelerators
  • Benchmark and diagnose performance bottlenecks of deep learning models
  • Work with ML experts to optimize their networks for HW acceleration
Requirements
  • Bachelor's, Masters or PhD degree in Electrical Engineering, Computer Science, or a related field
  • 5+ years of experience working on ML inference performance optimization either in SW or HW space
  • Proficient in Python and working knowledge of C++
  • Strong understanding of computer systems and the interactions between HW and SW
  • Experience with backend compilation, ML/HW/SW co-design, and/or performance optimization


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