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Senior Physical Design Engineer
2 months ago
We are seeking a highly skilled Senior Physical Design Engineer to join our team at Tenstorrent Inc. as a key member of our AI/ML architecture design team. The successful candidate will be responsible for leading the physical design aspects of high-performance designs, working closely with our front-end team to define PD requirements and drive physical aspects early in the design cycle.
Key Responsibilities- Physical Design Leadership: Define PD requirements, understand chip architecture, and drive physical aspects early in the design cycle.
- Design Implementation: Perform synthesis, Place and Route (PnR), timing closure, area improvement, floorplanning, clocking, I/O planning, and power optimization.
- Collaboration and Communication: Discuss design requirements with 3rd party IP providers, foundry partners, and design services.
- End-to-End Tasks: Develop and implement flow development, sign-off, and other end-to-end tasks.
- Design Optimization: Deploy innovative techniques to improve power, performance, and area of the design, drive experiments with RTL, and evaluate synthesis, timing, and power results.
- Education: Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- Design Experience: Hands-on experience with synthesis, block, and chip-level implementation using industry-standard PnR flows and tools.
- Chip Design Expertise: Strong experience in SOC/ASIC/GPU/CPU design flows on taped-out designs, expertise in timing closure at block/chip levels, and ECO flows.
- Design Tools: Experience with back-end design tools such as Primetime, Innovus, RedHawk, etc.
- Low-Power Design: Knowledge of low-power design flows such as power gating, multi-Vt, and voltage scaling.
- Programming Skills: Strong programming skills in Tcl, Perl, Shell, and Python.
- Logic Design Fundamentals: Excellent understanding of logic design fundamentals and gate/transistor-level implementation.
- DFT and Debug: Exposure to Design for Test (DFT) and strong problem-solving and debug skills across various levels of design hierarchies.
- Technology Node Experience: Prior experience working on high-performance technology nodes and understanding of deep sub-micron design problems/solutions.
