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Digital Design Methodology Engineer
2 months ago
We are seeking a highly skilled Digital Design Methodology Engineer to join our Silicon Technologies group at Apple. As a member of this team, you will play a critical role in designing and manufacturing our next-generation, high-performance, power-efficient processor, system-on-chip (SoC).
Key Responsibilities- Design and implement innovative design methodologies for mixed-signal IP designs
- Collaborate with RTL, PD, and timing design teams, CAD team, and EDA vendors to optimize design flows
- Provide documentation, training, and support for new users
- Diagnose and resolve reported problems, and generate block/chip-level static timing constraints
- Develop and validate high-performance, low-power clock network guidelines
- Perform block-level place and route, and close the design to meet timing, area, and power constraints
- Generate and implement ECOs to fix timing, noise, and EM IR violations
- Run physical design verification flow at chip/block level and provide guidelines to fix LVS/DRC violations
- Typically requires 4+ years of experience in Synthesis, PNR, and Power/Timing flows development
- Understanding and exposure to Low Power Design analysis flows
- Strong knowledge of Synthesis, PNR, Power, Timing, Simulation flows, EDA tools, UPF, algorithm, scripting (TCL/Perl/Python), and Makefiles
- Excellent verbal and written communication skills
Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
We offer a comprehensive benefits package, including medical and dental coverage, retirement benefits, and a range of discounted products and free services. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.