Senior Software Engineer
1 month ago
The successful applicant will be responsible for designing and integrating digital IP for MCU16 microcontroller products. This role will involve micro architecture, RTL design, synthesis, DFT compatibility, and power analysis of the IP based upon the ASIC design flow.
The ideal candidate will have active participation and working in a global team environment, interfacing with other design, architecture, and application engineers.
Key Responsibilities:- SystemVerilog RTL coding, simulation, synthesis, and Clock Domain Crossing analysis of complex digital IP to meet target specifications and customer requirements
- Full chip integration of IP into MCU16 mixed signal microcontroller products
- Interface with and support architecture, applications, test, technology development, and other product development engineers
- BSEE minimum, MSEE preferred and at least 7 years experience in development of large, complex digital modules
- Perform HDL design using the SystemVerilog Language
- Advanced skills in various programming languages including Verilog, System Verilog, C, C++, Perl, TCL, Assembly, Python
- Hands on experience with Lint/CDC tools such as Spyglass LP and knowledge of DFT methodology
- Hands on experience with Synopsys tools such as Design Compiler, Prime Time, and Formality
- Understanding of mixed signal RTL design flow and integration into mixed signal microcontroller products
- Experience with design tools including Mentor, Cadence, Novas, CVS, Jira a plus
0% - 25%
Physical Attributes:Hearing, Seeing, Talking
Physical Requirements:80% sitting, 10% walking, 10% standing
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