ASIC Design Verification Specialist

2 months ago


San Jose, California, United States Sql Pager LLC Full time
Job Description

At Sql Pager LLC, we are seeking a skilled ASIC Verification Engineer to join our team. As an ASIC Verification Engineer, you will play a critical role in ensuring the quality and reliability of our ASIC designs.

Key Responsibilities:
  • Collaborate with the design team to review and understand specifications, architectures, and micro-architectures.
  • Develop and review verification test plans.
  • Create block-level and chip-level verification environments, including testbenches, scoreboards, regressions, tools, infrastructure, and methodology.
  • Produce functional and code coverage metrics.
  • Run regression and debug/triage failures in the simulation environment.
  • Validate features and work with software teams to debug issues in the lab.
Requirements:
  • BSEE with 3+ years or MSEE with 1+ years of experience.
  • Advanced knowledge of standard ASIC/FPGA verification flows, including simulation, testbench development, and post-silicon bring-up and validation.
  • Excellent knowledge of System Verilog and Verilog.
  • Experience in developing testbenches using the OVM, VMM, or UVM methodology.
  • Good knowledge of C/C++.
  • Experience with either Perl or Python scripts.
  • Knowledge of industry high-speed interface standard protocols (PCI Express, DDR, NAND Flash, etc.) is strongly desired.
  • Experience in computer storage and networking is desired.
  • Team player with excellent communication skills and the desire to take on diverse challenges.


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